peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 306

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Transmit Signaling Register 1...12
The transmit signaling register access is enabled by setting bit FMR5.EIBR = 1. Each
register contains the bit-robbing information for 8 DS0 channels.
Starting with XMB (transmit multiframe begin), the contents of these registers is copied
into a shadow register bank. Upon completion, CAS empty interrupt ISR1.CASE is set.
The contents of the shadow registers is sent out subsequently in the corresponding bit
positions of the next outgoing multiframe. The transmit CAS empty interrupt ISR1.CASE
requests that these registers should be serviced within the next 3 ms before the next
multiframe begin. If requests for new information are ignored, current contents is
repeated.
If access to XS1...12 registers is done without control of the interrupt ISR1.CASE and the
write access to these registers is done exact in that moment when this interrupt is
generated, data may be lost.
Note: A software reset (CMDR.XRES) resets these registers.
Data Sheet
306
FALC-LH V1.3
T1/J1 Registers
PEB 2255
2000-07