ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 87
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ADP315PC87570
Manufacturer Part Number
ADP315PC87570
Description
Keyboard and Power Management Controller
Manufacturer
National Semiconductor
Datasheet
1.ADP315PC87570.pdf
(168 pages)
- Current page: 87 of 168
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10.3.6 Pending Register 3 (WKPND3)
The WKPND3 Register is a byte-wide, read/write register,
that latches the occurrence of a selected trigger condition
associated with the input signals WUI30 to WUI37. For a
detailed description of the register see the above descrip-
tion of the WKPND1 Register.
10.3.7 Wake-Up Enable Register 1 (WKEN1)
The WKEN1 Register is a byte-wide, read/write register,
that enables a wake-up function of the associated input sig-
nals WUI10 to WUI17. On reset, WKEN1 is cleared (0). This
disables the associated input signals.
Bits 7-0 - Wake-Up Enable (WKEN10-17)
10.3.8 Wake-Up Enable Register 2 (WKEN2)
The WKEN2 Register is a byte-wide, read/write register,
that enables a wake-up function of the associated input sig-
nals WUI20 to WUI27. For a detailed description of the reg-
ister see the above description of the WKEN1 Register.
10.3.9 Wake-Up Enable Register 3 (WKEN3)
The WKEN3 Register is a byte-wide, read/write register,
that enables a wake-up function of the associated input sig-
nals WUI30 to WUI37. For a detailed description of the reg-
ister see the above description of the WKEN1 Register.
10.3.10 Pending Clear Register 1 (WKPCL1)
The WKPCL1 Register controls the clearing (0) of the pend-
ing bits associated with the WUI10 through WUI17 inputs.
This avoids potential hardware/software collisions during
read-modify-write operations. The register is a byte-wide
write-only register.
Bits 7-0 - Wake-Up Pending Clear (WKPCL10-17)
If any bit is set to1, the associated pending flag located in
WKPND1 is cleared (0). Writing a 0 to any bit position
leaves the value of the corresponding pending flag un-
changed.
10.3.11 Pending Clear Register 2 (WKPCL2)
The WKPCL2 Register controls the clearing (0) of the pend-
ing bits associated with the WUI20 through WUI27 inputs.
For a detailed description of the register, see the above de-
scription of the WKPCL1 Register.
7
7
If set (1), a valid trigger condition on the associated input
generates a wake-up signal or EXTINTx interrupt re-
quest.
If cleared (0), the associated input does not generate a
wake-up signal but may generate an interrupt request if
the corresponding MIWU output is routed to the ICU.
WKPCL17-WKPCL10
WKEN17-WKEN10
Multi-Input Wake-Up (MIWU)
0
0
87
10.3.12 Pending Clear Register 3 (WKPCL3)
The WKPCL3 Register controls the clearing (0) of the pend-
ing bits associated with the WUI30 through WUI37 inputs.
For a detailed description of the register, see the above de-
scription of the WKPCL1 Register.
10.4 USAGE HINTS
1. To change an edge select, perform the following steps
2. The correct use of the MIWU circuit, which avoids false
3. On Reset, the WKEDGx Register is configured to select
to avoid a pseudo wake-up condition as a result of the
edge change:
a. Clear the associated WKENx bit, followed by the
b. Clear the associated WKPDx bit, then re-enable the
triggering of a wake-up condition, requires the following
sequence of actions. Use the same procedure following
a Reset since the wake-up inputs are left floating, pro-
ducing unknown data on the MIWU input signals.
a. Clear the WKENx Register, or if used as an inter-
b. Write the WKEDGx Register to select the desired
c. Clear the WKPNDx Register to cancel any pending
d. Either set the WKENx bits associated with the pins
positive-going edge sensitivity for all wake-up inputs. To
change the edge sensitivity of an input signal, while
avoiding false triggering of a wake-up/interrupt condi-
tion, use the following procedure.
a. Clear the WKENx bit associated with the WUIxx in-
b. Write the WKEDGx Register to select the new type
c. Clear the WKPNDx bit associated with the WUIxx in-
d. Set the WKENx bit associated with the WUIxx input
edge select change in the WKEDGx Register.
associated WKENx bit.
rupt, disable the interrupt via the ICU.
type of edge sensitivity for each of the pins used.
bits.
to be used, thus enabling them for the wake-up/in-
terrupt function, or re-enable the interrupt via the
ICU.
put to disable that input.
of edge sensitivity for the specific input.
put.
to re-enable it.
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