ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 2
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ADP315PC87570
Manufacturer Part Number
ADP315PC87570
Description
Keyboard and Power Management Controller
Manufacturer
National Semiconductor
Datasheet
1.ADP315PC87570.pdf
(168 pages)
- Current page: 2 of 168
- Download datasheet (892Kb)
www.national.com
Features
•
•
•
•
•
•
CR16A Core
— 16-bit embedded RISC processor core
Bus Interface Unit (BIU)
— Three address zones for static devices (SRAM,
— Configurable wait states and fast read bus cycles
Internal Memory
— 2048 bytes of on-chip ROM
— 1024 bytes of on-chip RAM
— All memories can hold both code and data
External Memory
— Supports BIOS memory (Flash) sharing with PC host
— Up to 56 Kbyte for code and data
— Field upgradable with Flash or SRAM devices
— Supports host controlled code download and update
Host Bus Interface (HBI)
— Three host interface channels, typically used for the
— Motherboard Plug and Play (PnP) configuration
— Host power supply indicator input pin
— 8042 KBC standard Interface (60h, 64h)
— Intel 80C51SL compatible
— IRQ1 and IRQ12 support
— Fast Gate A20 and Fast host Reset, via firmware
— PM interface port (62h, 66h)
— PM port IRQ11
Real-Time Clock (RTC) and Advanced Power Control
(APC)
— RTC
— APC
ROM FLASH, I/O)
KBC, PM and RTC devices
o
o
o
o
o
o
o
o
o
o
o
o
o
o
With Enable and Lock bits for each device
Relocatable address for each device
DS1287, MC146818 and PC87911 compatible
242 bytes battery backed-up CMOS RAM
Calendar including century and automatic leap-
year adjustment
Optional daylight saving adjustment
BCD or binary format for timekeeping
Three individually maskable interrupt event
flags: periodic rates from 122 s to 500 ms; time-
of-day alarm, once per second to once per day
Separate backup battery pin
Double buffer time registers
The CMOS RAM and the RTC registers can be
accessed by the CR16A firmware
Alarm wake-up
Hardware wake-up events
Software off events
Highlights
2
•
•
•
•
•
•
•
HFCG
— On-chip frequency multiplier
— Single 32.786KHz crystal
— Software controlled frequency generation
PMC
— 3.3 and 5V operation with mixed voltage system
— Reduced power consumption capability
— Back-drive protection
— Three power modes, switched by software or hard-
— Automatic wake-up on system events
ICU
— 16 maskable interrupt sources
— Four general purpose external interrupt inputs
— Programmable trigger mode (level: high or low,
— Enable and pending indication for each interrupt
— Non-maskable interrupt input
MIWU
— Supports up to 24 wake-up or interrupt inputs
— Generates wake-up to PMC
— Generates interrupts to ICU
— Provides user-selectable trigger conditions
GPIO
— 76 ports
— I/O pins individually configured as input or output
— Configurable internal pull-up resistors
— Special ports for internal keyboard matrix scanning
— Special input for system On/Off switch
— Supports very low-cost implementation of additional
PS/2 Interface
— Supports three independent devices (external KBC,
— Supports byte level handling via hardware accelerator
ACB Interface
— Intel SMBus and Philips I
— ACCESS.bus master and slave
— Supports polling and interrupt controlled operation
— Generates a wake-up signal on detection of a Start
— Optional internal pull-up on SDA and SCL pins
support
ware:
o
o
o
edge: falling or rising)
o
o
off-chip I/O ports
mouse and additional pointing device)
Condition, while in power-down mode
Active mode operating frequency 4-10MHz
Idle (20 A)
Power Off - RTC only (0.9 A typical) from back-
up battery
16 open-collector outputs
8 Schmidt inputs with internal pull-up
2
C
®
compatible
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