ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 129

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ADP315PC87570

Manufacturer Part Number
ADP315PC87570
Description
Keyboard and Power Management Controller
Manufacturer
National Semiconductor
Datasheet
Back-Drive Protection. To maintain the high performance
of the analog circuits, the DA0-3 pins are not back-drive pro-
tected. Therefore, the voltage on these pins must be within
the actual range of AGND and AV
may be damaged.
External circuits should not drive currents into these pins
when the PC87570 is not powered up. This may cause the
internal power-up reset circuit to fail.
17.4.2 Output Settling Time
The DAC output settling time depends on the external load
characteristics and the required accuracy. Figure 17-3
shows the equivalent circuit used for evaluating DAC be-
havior. Each DAC output has a typical output impedance of
3 K
only, the output settles to 1/2 LSB within 1 s. The total load
capacitance is comprised of the analog output capacitance
(C
Figure 17-2. DAC Analog Power Supply Connection
AO
Analog
Power
Z
C
22
L
) and the external load capacitance (C
F
2
Analog Ground Layer
Figure 17-3. DAC Output Equivalent Circuit
For example, if the total load is a 50 pF capacitor
AV
Equivalent Circuit
+
CC
DAC Output
C
3
*
0.1
L
F
DACDAT
1
R
256
10-100 H
O
C
AD0
AD1
AD2
AD3
AO
AV
AGND
CC
PC87570
CC
Digital Ground Layer
GND
V
. If it is higher, the chip
CC
Load Circuit
Application
C
L
L
Digital to Analog Converter (DAC)
C
).
R
4
L
0.1
F
+
Digital
Power
3.3 V
5.0 V
C
or
22
5
F
129
17.4.3 Output Voltage Accuracy
The external load on the DA3-0 pins may affect the final out-
put voltage of the DAC. Since the output resistance of these
pins is typically 3 K
drivers if higher accuracy or output currents are required.
See Table 19-6 on page 134.
For the worst case calculation, if the output resistance is
4 K
than 2 M . In this case, the error caused by the load is low-
er than 1/2 LSB and there is no need for an external analog
driver.
To work with loads of 5 K (1 mA at 5 V) with an error lower
than 1/2 LSB, the output resistance of the external driver
should be lower than:
17.4.4 Filtering Noise on Output Signals
Output signals may present unwanted noise caused by the
digital circuits they pass nearby. Optionally, when using
slow changing signals in a noisy environment, a low pass fil-
ter (LPF) may be added externally. This may also be re-
quired in applications where the DAC outputs control
sensitive circuits like audio amplifiers. This can be imple-
mented as a simple RC circuit. The cutoff frequency of this
LPF should be above the required signal frequency.
17.4.5 Current Consumption
When a channel is enabled, the current consumption de-
pends on the value set in the DACDAT Register. Minimal
current is consumed when the data is 00h. Maximum cur-
rent is consumed when the data is 55h. In this case, and
when all four channels are enabled with no external load on
the DA0-3 pins, at AV
the DAC is typically 5.6 mA (1.4 mA/channel).
The current consumption of any of the DAC channels is
practically zero and its output drives 0 V if one or more of
the following conditions are true:
See Section 17.2.5 for details on disabling the DAC.
17.4.6 Entering Idle Mode
When the chip enters Idle mode, the hardware automatical-
ly disables all four DAC channels and resets the outputs to
drive 0 V, without modifying the DACCTRL or DACDAT
Registers.
When the DAC is disabled, its current consumption from
AV
PC87570 to Idle mode are described in Section 8.3.1 on
page 79.
CC
The chip is in Idle mode (see Chapter 8 on page 79).
The channel is disabled by clearing its corresponding
DACEN bit of the DACCTRL Register.
The value written into its DACDATA Register is 00h.
(maximum limit), the external load must not be lower
is lower than 0.1 A. More details on how to set
5 K / (2
*
256) = 9.8
CC
use external high impedance analog
=5.0V, the current consumption of
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