ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 80

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

8.4 POWER MODE CONTROL REGISTER (PMCR)
The PMCR Register is a byte-wide, read/write register that
enables you to switch from Active to Idle mode. In addition,
it controls the operation of the HFCG in Idle mode by en-
abling or disabling it. The PC87570 enters Idle mode after
execution of a WAIT instruction. The PMCR Register must
be set before executing the WAIT instruction.
Upon reset, the non-reserved bits of PMCR are cleared.
Bit 1 - Disable High Frequency Clock Generator (DHF)
Bit 2 - IDLE
Bit 5 - Enable Idle Mode (EIM)
Reserved
0: HFCG remains enabled after entering Idle mode;
1: HFCG disabled only after WAIT instruction is exe-
0: PC87570 remains in Active mode after WAIT in-
1: PC87570 can enter Idle mode, depending on set-
0: Idle mode not enabled
1: Active to Idle mode switch enabled, performed by
7
waking up to Active mode clears this bit
cuted and Idle mode is entered
struction is executed
ting of EIM bit; waking up to Active mode clears
this bit
setting IDLE bit and executing a WAIT instruction.
6
EIM
5
Reset
Reserved IDLE
4
Turn Off Power
PMCR.EIM=1
PMCR.IDLE=1
and WAIT
Figure 8-1. Power Modes and Transitions
3
2
DHF
1
Power Mode Control (PMC)
Res
0
Power Off
Active
Idle
80
8.5 USAGE HINTS
The hints below apply when you enter Idle mode and dis-
able the HFCG.
1. When disabling HFCG in Idle mode, a frequency clock
2. After waking up from Idle mode, wait 0.5 seconds before
may be generated that differs from the selected setting,
due to temperature variations in your working environ-
ment. For details, refer to “tCLKINTwk” on page 138. To
avoid any failures that may result from waking up to a
higher frequency than zone 0 of the External Memory
can handle, follow the procedures exactly.
Before entering Idle mode, configure SZCFG0 for an ad-
ditional Wait clock cycle (see the BIU, Section 3.5.3 on
page 45, for details on SZCFG0 configuration).
returning to your previous SZCFG0 configuration.
Hardware Event
Turn On Power
www.national.com