ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 128

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

17.2.4 Initializing and Enabling the DAC
The PC87570 wakes up after power-up with the DAC dis-
abled (DACEN0-3 bits of the DACCTRL Register are
cleared). In this state, all DAC activities are halted, and its
power consumption is reduced to zero.
Initializing the DAC. The DACDAT0-3 Registers must be
initialized to 00h before setting the DACEN0-3 bits of the
DACCTRL Register.
Enabling the DAC. The
DACDAT0-3 Registers to 00h before enabling any of the
DAC channels. Each channel of the DAC is enabled inde-
pendently by setting its DACEN bit. After enabling the DAC,
the only delay required is for settling the outputs.
17.2.5 Disabling the DAC
The DAC may be disabled in order to reduce the current
consumption from the AV
The DAC is automatically disabled when entering Idle
mode, regardless of the state of DACEN bits in the DAC-
CTRL Register. In this case, the DA0-3 outputs automati-
cally drive 0 V.
To disable the DAC without entering Idle mode, the
DACEN0-3 bits must be cleared. In this case, the output
pins are 0 V even if the respective DACDAT Register is not
00h.
17.2.6 Conversion Start
When the DAC is enabled, a conversion is started when
writing to the DACDATA Registers. The output settling time
is defined in Section 17.4.2.
17.3 DAC REGISTERS
The DAC interfaces through the peripheral bus with the
CR16A core, as shown in the block diagram on page 1. The
interface is implemented by a set of one control register and
four data registers. These registers are mapped in the ad-
dress space of the CR16A. For details on the address loca-
tion of these registers, refer to Appendix A on page 156.
17.3.1 DAC Control Register (DACCTRL)
The DACCTRL Register is a byte-wide, read/write register
that controls the configuration of the four D/A channels in
the module. After reset, the non-reserved bits in this register
are cleared (0).
Bits 3-0 - DAC Enable (DACEN3-0)
When set, the respective DAC channel is enabled and the
respective DA output pin drives a voltage level, according to
the value written into the corresponding DACDAT Register.
When cleared, the respective channel is disabled and its DA
output pin drives 0 V.
17.3.2 DAC Data Registers
Each of the four DAC channels has its own data register
that controls the analog voltage on the DA3-0 pins.
DACDAT0 through DACDAT3 control DA0 through DA3, re-
7
6
Res
5
4
DACEN3 DACEN2 DACEN1 DACEN0
3
CC
software
to less than 0.1 A (typical).
2
must
1
Digital to Analog Converter (DAC)
initialize
0
the
128
spectively. These read/write registers store the output data
in a byte-wide format, and should be initialized to 00h before
enabling the ADC.
17.4 USAGE HINTS
17.4.1 Power Supply and Layout Guidelines
The DAC and the other analog modules are supplied
through two, dedicated analog power pins, AV
AGND. This assures effective isolation of the analog mod-
ules from noise caused by the digital modules. For the best
performance, bear in mind the hints in this section (see also
details in Figure 17-2):
Ground Connection. The analog ground pin, AGND, must
be connected at only one point to the digital ground pins. At
this point, also connect the decoupling capacitor of the analog
supply AV
digital supply V
signals of the DAC should be taken from the same point. Low
impedance ground layers will also improve noise isolation.
Power Connection. The analog supply pin, AV
connected to a low noise power supply with the same volt-
age as the digital supply, either 3.3V or 5.0V. Both the digi-
tal and analog power supplies of the PC87570 must be
supplied simultaneously. To assure this, supply the AV
pin from the digital V
RC filter. An example of LC filter [L
in Figure 17-2.
Decoupling Capacitors. The following decoupling capaci-
tors must be used:
MSB
MSB
MSB
MSB
7
7
7
7
Digital V
V
place one 10-47 F tantalum capacitor (C
common net, as close as possible to the chip.
Analog AV
47 F tantalum capacitor on the AV
C
CC
2
), as close as possible to the pin.
pin, as close as possible to the pin, (4 x C
CC
6
6
6
6
CC
pin, and the four decoupling capacitors of the
CC
CC
: Place one capacitor of 0.1 F on each
: Place a 0.1 F capacitor and a 10-
5
5
5
5
pins. The ground reference of the output
CC
DAC DATA 0
DAC DATA 1
DAC DATA 2
DAC DATA 3
of the chip, using an external LC or
4
4
4
4
3
3
3
3
1
and (C
2
2
2
2
CC
2
+C
pin (C
1
1
1
1
CC
3
www.national.com
)] is shown
5
, must be
) on the
CC
4
). Also
LSB
LSB
LSB
LSB
3
0
0
0
0
and
and
CC