TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 73

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

6.6.6
reset. The release source that can be used is determined by the low power consumption mode selected.
Releasing the Low Power Consumption Mode
Note 1: To release the low power consumption mode by using the level mode interrupt, keep the level until the
Note 2: For shifting to the low power consumption mode, set the CPU to prohibit all the interrupts other than the
The low power consumption mode can be released by an interrupt request, Non-Maskable Interrupt (NMI) or
Details are shown in Table 6-8.
Refer to "Interrupts" for details.
Table 6-8 Release Source in Each Mode
Release
source
・ Release by interrupt request
・ Release by Non-Maskable Interrupt (NMI)
・ Release by reset
ο :
× :
interrupt handling is started. Changing the level before then will prevent the interrupt handling from starting
properly.
release source. If not, releasing may be executed by an unspecified interrupt.
detect the interrupt. In addition to the setting in the CPU, the clock generator must be set to detect the
interrupt to be used to release the SLEEP and STOP modes.
be used in the IDLE mode. The NMI pin can be used to release all the lower power consumption modes.
mode switches to the NORMAL mode and all the registers are initialized as is the case with normal
reset.
reset signal valid until the oscillator operation becomes stable.
To release the low power consumption mode by an interrupt, the CPU must be set in advance to
There are two kinds of NMI sources: WDT interrupt (INTWDT) and NMI pin. INTWDT can only
Any low power consumption mode can be released by reset from the RESET pin. After that, the
Note that returning to the STOP mode by reset does not induce the automatic warm-up. Keep the
NMI (INTWDT)
NMI (NMI pin)
RESET (RESET pin)
Starts the interrupt handling after the mode is released. (The reset initializes the LSI)
Unavailable
Interrupt
Low power consumption mode
INT0 to 7 (Note1)
INTRTC
INTTB0 to 9
INTCAP00 to 60, 01 to 61
INTRX0 to 2, INTTX0 to 2
INTSBI0 to 2
INTCECRX, INTCECTX
INTRMCRX0, 1
INTAD/INTADHP/INTADM0, 1
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IDLE
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
SLEEP
ο
ο
×
×
×
×
ο
ο
×
×
ο
ο
TMPM330FDFG/FYFG/FWFG
STOP
×
×
×
×
×
×
×
×
×
ο
ο
ο