TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 496

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

17.3
On-board Programming of Flash Memory (Rewrite/Erase)
Note:The protection bit erase command cannot erase by individual block.
Table 17-19 Protection Bit Erase Address Table
Block0 to 3
Block4 to 5
Table 17-20 The ID-Read command's fourth bus write cycle ID address (IA) and the
Block
IA[15:14]
00b
01b
10b
11b
data to be read by the following 32-bit data transfer command (ID)
<BLPRO[0:3]>
<BLPRO[4:5]>
Protection bit
0x11 (TMPM330FWFG)
0x12 (TMPM330FDFG)
0x12 (TMPM330FYFG)
Reserved
Page 476
ID[7:0]
0x5A
0x98
The seventh bus write cycle address [18:17]
Address[18]
0
0
Manufacturer code
Device code
Macro code
Code
−
Address[17]
0
1
TMPM330FDFG/FYFG/FWFG