TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 510
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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19.6
AC Electrical Characteristics
19.6
19.6.1
19.6.2
19.6.2.1
AC Electrical Characteristics
The AC characteristics data of this chapter is measured under the following conditions unless otherwise noted
SCLK Clock High width (input)
SCLK Clock Low width (input)
SCLK cycle
Output Data ←
SCLK rise or fall (Note 1)
SCLK rise →
Output Data hold or fall(Note1)
Valid Data input ←
SCLK rise or fall(Note1)
SCLK rise →
Input Data hold or fall(Note1)
AC measurement condition
Serial Channel (SIO/UART)
cycle time. It varies depending on the programming of the clock gear function.
・ Output levels: High = 0.8 × DVDD3, Low = 0.2 × DVDD3
・ Input levels: Refer to low-level input voltage and high-level input voltage in "DC Electrical Charac-
・ Load capacity: CL = 30pF
(1)
In the table below, the letter x represents the SIO operation clock cycle time which is identical to the fsys
I/O Interface mode
teristics".
Note 1: SCLK rise or fall …Measured relative to the programmed active edge of SCLK.
Note 2: Keep this value positive by adjusting SCLK cycle.
SCLK input mode
Parameter
Symbol
t
t
t
t
t
t
t
OHS
SCH
SCL
SCY
OSS
SRD
HSR
Page 490
t
SCY
t
SCH
/2 − 3x− 45
t
x + 30
SCY
Min
3x
3x
30
+ t
/2
Equation
SCL
Max
−
−
−
−
−
−
−
(Note2)
150
−45
Min
75
75
75
30
55
40 MHz
TMPM330FDFG/FYFG/FWFG
Max
−
−
−
−
−
−
−
Unit
ns
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