PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 393

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

INTCON Register
Inter-Integrated Circuit. See I
Interrupt Sources
Interrupt-on-Change (RB7:RB4) Flag
Interrupts ..................................................................... 77, 265
Interrupts, Flag Bits
IORLW .............................................................................. 304
IORWF .............................................................................. 304
L
LFSR ................................................................................. 305
Listen Only Mode (CAN Module) ...................................... 226
Look-up Tables ................................................................... 43
Loopback Mode (CAN Module)......................................... 226
 2004 Microchip Technology Inc.
NEGF ........................................................................ 309
NOP .......................................................................... 309
POP .......................................................................... 310
PUSH ........................................................................ 310
RCALL ...................................................................... 311
RESET ...................................................................... 311
RETFIE ..................................................................... 312
RETLW ..................................................................... 312
RETURN ................................................................... 313
RLCF......................................................................... 313
RLNCF ...................................................................... 314
RRCF ........................................................................ 314
RRNCF ..................................................................... 315
SETF......................................................................... 315
SLEEP ...................................................................... 316
SUBFWB................................................................... 316
SUBLW ..................................................................... 317
SUBWF ..................................................................... 317
SUBWFB................................................................... 318
SWAPF ..................................................................... 318
TBLRD ...................................................................... 319
TBLWT...................................................................... 320
TSTFSZ .................................................................... 321
XORLW..................................................................... 321
XORWF..................................................................... 322
Summary Table......................................................... 284
RBIF Bit....................................................................... 96
A/D Conversion Complete ........................................ 244
CAN Module.............................................................. 238
Capture Complete (CCP).......................................... 125
Compare Complete (CCP)........................................ 126
Interrupt-on-Change (RB7:RB4) ................................. 96
TMR0 Overflow ......................................................... 111
TMR1 Overflow ................................................. 113, 115
TMR2 to PR2 Match ................................................. 118
TMR2 to PR2 Match (PWM) ............................. 117, 128
TMR3 Overflow ................................................. 119, 121
(RBIF Bit) .................................................................... 96
Context Saving During ................................................ 92
Enable Registers......................................................... 85
Flag Registers............................................................. 82
INT .............................................................................. 92
PORTB Interrupt-on-Change ...................................... 92
Priority Registers......................................................... 88
TMR0 .......................................................................... 92
A/D Converter Flag (ADIF Bit) .................................. 243
CCP1 Flag (CCP1IF Bit) ........................... 124, 125, 126
Computed GOTO........................................................ 43
Table Reads/Table Writes .......................................... 43
2
C.
Low-Voltage Detect .......................................................... 259
Low-Voltage ICSP Programming...................................... 279
LVD. See Low-Voltage Detect.
M
Master Synchronous Serial Port (MSSP).
Master Synchronous Serial Port.
Memory Organization ......................................................... 37
Migrating from other PICmicro Devices ............................ 386
MOVF ............................................................................... 305
MOVFF ............................................................................. 306
MOVLB ............................................................................. 306
MOVLW ............................................................................ 307
MOVWF ............................................................................ 307
MPLAB ASM30 Assembler,
MPLAB ICD 2 In-Circuit Debugger ................................... 325
MPLAB ICE 2000 High-Performance
MPLAB ICE 4000 High-Performance
MPLAB Integrated Development
MPLAB PM3 Device Programmer .................................... 325
MPLINK Object Linker/
MSSP ............................................................................... 143
MSSP. See also I
MULLW............................................................................. 308
MULWF............................................................................. 308
N
NEGF................................................................................ 309
NOP .................................................................................. 309
Normal Operation Mode (CAN Module)............................ 226
Characteristics.......................................................... 338
Current Consumption ............................................... 263
Effects of a Reset ..................................................... 263
Operation.................................................................. 262
Operation During Sleep ............................................ 263
Reference Voltage Set Point .................................... 263
Typical Application.................................................... 259
See MSSP.
See MSSP.
Data Memory .............................................................. 44
Internal Program Memory Operation .......................... 37
Program Memory........................................................ 37
Linker, Librarian........................................................ 324
Universal In-Circuit Emulator.................................... 325
Universal In-Circuit Emulator.................................... 325
Environment Software .............................................. 323
MPLIB Object Librarian ............................................ 324
Control Registers...................................................... 143
Enabling SPI I/O ....................................................... 147
Operation.................................................................. 146
Overview................................................................... 143
SPI Master Mode...................................................... 148
SPI Master/Slave Connection................................... 147
SPI Mode.................................................................. 143
SPI Slave Mode........................................................ 149
TMR2 Output for Clock Shift............................. 117, 118
Typical Connection ................................................... 147
2
C Mode, SPI Mode.
PIC18FXX8
DS41159D-page 391