PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 252

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

21.1
There are eight modes of operation for the compara-
tors. The CMCON register is used to select these
modes. Figure 21-1 shows the eight possible modes.
The TRISD register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 21-1:
DS41159D-page 250
PIC18FXX8
Comparators Reset (POR Default Value)
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 010
Two Common Reference Comparators
CM2:CM0 = 100
One Independent Comparator with Output
CM2:CM0 = 001
A = Analog Input, port reads zeros always
D = Digital Input
CIS (CMCON<3>) is the Comparator Input Switch
RD1/PSP1
RD0/PSP0
RE1/AN6/WR/C1OUT
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
Comparator Configuration
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off
Off
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off
(Read as ‘0’)
(Read as ‘0’)
(Read as ‘0’)
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
Two Independent Comparators with Outputs
CM2:CM0 = 011
Comparators Off
CM2:CM0 = 111
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RD1/PSP1
RD0/PSP0
RE1/AN6/WR/C1OUT
RD3/PSP3
RD2/PSP2
RE2/AN7/CS/C2OUT
RE1/AN6/WR/
C1OUT
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RE2/AN7/CS/C2OUT
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
RD1/PSP1
RD0/PSP0
RD3/PSP3
RD2/PSP2
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 27.0 “Electrical Characteristics”.
Note:
A
A
A
D
A
A
A
A
D
D
D
D
A
A
A
A
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
 2004 Microchip Technology Inc.
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
C1OUT
C2OUT
Off
Off
C1
C2
From V
(Read as ‘0’)
(Read as ‘0’)
REF
C1OUT
C2OUT
Module