PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 308

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS41159D-page 306
PIC18FXX8
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
[ label ]
0
0
(f
None
The contents of source register ‘f
moved to destination register ‘f
Location of source ‘f
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF is particularly useful for
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
The MOVFF instruction should not be
used to modify interrupt settings while
any interrupt is enabled (see page 77).
2
2 (3)
MOVFF
s
Read
(src)
read
)
1100
1111
No
Q2
f
f
=
=
=
=
s
d
f
d
4095
4095
0x33
0x11
0x33
0x33
MOVFF f
REG1, REG2
ffff
ffff
operation
Process
Data
No
Q3
s
s
,f
’ can be anywhere
ffff
ffff
d
register ‘f’
operation
(dest)
Write
d
No
Q4
ffff
ffff
’.
s
’ are
d
’
s
d
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move Literal to Low Nibble in BSR
[ label ]
0
k
None
The 8-bit literal ‘k’ is loaded into the
Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
‘k’
k
=
=
BSR
 2004 Microchip Technology Inc.
255
0x02
0x05
MOVLB k
5
0001
Process
Data
Q3
kkkk
literal ‘k’ to
Write
BSR
Q4
kkkk