PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 289

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PIC18F4580-I/P

Manufacturer Part Number
PIC18F4580-I/P
Description
40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4580-I/P

A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8 bit, 3-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
25.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Instruction Set
W
W
Q1
=
=
ADD Literal to W
[ label ] ADDLW
0
(W) + k
N, OV, C, DC, Z
The contents of W are added to the 8-bit
literal ‘k’ and the result is placed in W.
1
1
0x10
0x25
literal ‘k’
ADDLW
0000
k
Read
Q2
255
W
0x15
1111
Process
Data
Q3
k
kkkk
Write to W
Q4
kkkk
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
ADD W to f
[ label ] ADDWF
0
d
a
(W) + (f)
N, OV, C, DC, Z
Add W to register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access Bank
will be selected. If ‘a’ is ‘1’, the BSR is
used.
1
1
ADDWF
Read
0010
Q2
f
[0,1]
[0,1]
0x17
0xC2
0xD9
0xC2
255
PIC18FXX8
dest
01da
REG, W
Process
Data
Q3
DS41159D-page 287
f [,d [,a]]
ffff
destination
Write to
Q4
ffff

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