PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 208

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

19.2.2
This section describes the CAN Transmit Buffer
registers and their associated control registers.
REGISTER 19-4:
DS41159D-page 206
PIC18FXX8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
CAN TRANSMIT BUFFER
REGISTERS
TXBnCON: TRANSMIT BUFFER n CONTROL REGISTERS
bit 7
Legend:
R = Readable bit
-n = Value at POR
Unimplemented: Read as ‘0’
TXABT: Transmission Aborted Status bit
1 = Message was aborted
0 = Message was not aborted
TXLARB: Transmission Lost Arbitration Status bit
1 = Message lost arbitration while being sent
0 = Message did not lose arbitration while being sent
TXERR: Transmission Error Detected Status bit
1 = A bus error occurred while the message was being sent
0 = A bus error did not occur while the message was being sent
TXREQ: Transmit Request Status bit
1 = Requests sending a message. Clears the TXABT, TXLARB and TXERR bits.
0 = Automatically cleared when the message is successfully sent
Unimplemented: Read as ‘0’
TXPRI1:TXPRI0: Transmit Priority bits
11 = Priority Level 3 (highest priority)
10 = Priority Level 2
01 = Priority Level 1
00 = Priority Level 0 (lowest priority)
Note:
Note:
U-0
—
Clearing this bit in software while the bit is set will request a message abort.
These bits set the order in which the Transmit Buffer will be transferred. They do
not alter the CAN message identifier.
TXABT
R-0
TXLARB
W = Writable bit
‘1’ = Bit is set
R-0
TXERR
R-0
TXREQ
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
 2004 Microchip Technology Inc.
x = Bit is unknown
TXPRI1
R/W-0
TXPRI0
R/W-0
bit 0