PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 245

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(V
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To oper-
ate in Sleep, the A/D conversion clock must be derived
from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
FIGURE 20-1:
 2004 Microchip Technology Inc.
REF
DD
+ pin and RA2/AN2/V
and V
Note 1: Channels AN5 through AN7 are not available on PIC18F2X8 devices.
SS
2: All I/O pins have diode protection to V
) or the voltage level on the RA3/AN3/
Converter
10-bit
A/D
Reference
voltage
A/D BLOCK DIAGRAM
REF
- pin.
V
V
REF
REF
-
+
(Input Voltage)
V
AIN
PCFG0
DD
and V
V
DD
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input (RA3 can also be a
voltage reference) or as a digital I/O.
The ADRESH and ADRESL registers contain the result
of the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH/ADRESL
registers, the GO/DONE bit (ADCON0<2>) is cleared
and A/D Interrupt Flag bit, ADIF, is set. The block
diagram of the A/D module is shown in Figure 20-1.
SS
.
V
SS
CHS2:CHS0
111
110
101
100
011
010
001
000
PIC18FXX8
DS41159D-page 243
AN7
AN2
AN1
AN0
AN6
AN5
AN4
AN3
(1)
(1)
(1)