PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 236

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PIC18F4580-I/P

Manufacturer Part Number
PIC18F4580-I/P
Description
40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4580-I/P

A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8 bit, 3-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
19.7.1
As already mentioned, the time quanta is a fixed unit
derived from the oscillator period and baud rate
prescaler. Its relationship to T
rate is shown in Example 19-2.
EXAMPLE 19-2:
The frequencies of the oscillators in the different nodes
must be coordinated in order to provide a system wide
specified nominal bit time. This means that all oscilla-
tors must have a T
It should also be noted that although the number of T
is programmable from 4 to 25, the usable minimum is
8 T
ensured to operate correctly.
DS41159D-page 234
PIC18FXX8
T
T
Nominal Bit Rate (bits/s) = 1/T
CASE 1:
For F
Nominal Bit Time = 8 T
T
T
Nominal Bit Rate = 1/10
CASE 2:
For F
Nominal Bit Time = 8 T
T
T
Nominal Bit Rate = 1/1.6 * 10
CASE 3:
For F
Nominal Bit Time = 25 T
T
T
Nominal Bit Rate = 1/1.28 * 10
Q
BIT
Q
BIT
Q
BIT
Q
BIT
Q
= (2 * 1)/16 = 0.125 s (125 ns)
= (2 * 2)/20 = 0.2 s (200 ns)
= (2 * 64)/25 = 5.12 s
( s) = (2 * (BRP + 1))/F
. A bit time of less than 8 T
( s) = T
= 8 * 0.125 = 1 s (10
= 8 * 0.2 = 1.6 s (1.6 * 10
= 25 * 5.12 = 128 s (1.28 * 10
OSC
OSC
OSC
= 16 MHz, BRP<5:0> = 00h and
= 20 MHz, BRP<5:0> = 01h and
= 25 MHz, BRP<5:0> = 3Fh and
TIME QUANTA
Q
( s) * number of T
OSC
CALCULATING T
NOMINAL BIT RATE AND
NOMINAL BIT TIME
that is an integral divisor of T
-6
Q
Q
= 10
Q
:
:
-6
OSC
:
s)
-6
BIT
6
-4
s =
BIT
(MHz)
-6
bits/s (1 Mb/s)
= 7813 bits/s
s)
Q
and the nominal bit
per bit interval
-4
625,000 bits/s
(625 Kb/s)
(7.8 Kb/s)
Q
s)
in length is not
Q
,
Q
Q
.
19.7.2
This part of the bit time is used to synchronize the
various CAN nodes on the bus. The edge of the input
signal is expected to occur during the sync segment.
The duration is 1 T
19.7.3
This part of the bit time is used to compensate for
physical delay times within the network. These delay
times consist of the signal propagation time on the bus
line and the internal delay time of the nodes. The length
of the Propagation Segment can be programmed from
1 T
19.7.4
The phase buffer segments are used to optimally
locate the sampling point of the received bit within the
nominal bit time. The sampling point occurs between
Phase Segment 1 and Phase Segment 2. These
segments can be lengthened or shortened by the
resynchronization process. The end of Phase Segment
1 determines the sampling point within a bit time.
Phase Segment 1 is programmable from 1 T
in duration. Phase Segment 2 provides delay before
the next transmitted data transition and is also
programmable from 1 T
due to IPT requirements, the actual minimum length of
Phase Segment 2 is 2 T
equal to the greater of Phase Segment 1 or the
Information Processing Time (IPT).
19.7.5
The sample point is the point of time at which the bus
level is read and the value of the received bit is deter-
mined. The sampling point occurs at the end of Phase
Segment 1. If the bit timing is slow and contains many
T
line at the sample point. The value of the received bit is
determined to be the value of the majority decision of
three values. The three samples are taken at the sam-
ple point and twice before, with a time of T
each sample.
19.7.6
The Information Processing Time (IPT) is the time
segment, starting at the sample point, that is reserved
for calculation of the subsequent bit level. The CAN
specification defines this time to be less than or equal
to 2 T
Thus, Phase Segment 2 must be at least 2 T
Q
, it is possible to specify multiple sampling of the bus
Q
to 8 T
Q
. The PIC18FXX8 defines this time to be 2 T
Q
SYNCHRONIZATION SEGMENT
PROPAGATION SEGMENT
PHASE BUFFER SEGMENTS
SAMPLE POINT
INFORMATION PROCESSING TIME
by setting the PRSEG2:PRSEG0 bits.
Q
.
Q
 2004 Microchip Technology Inc.
Q
to 8 T
or it may be defined to be
Q
in duration. However,
Q
/2 between
Q
Q
long.
to 8 T
Q
Q
.

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