PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 127

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

15.2.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE registers) clear to avoid false interrupts
and should clear the flag bit CCP1IF, following any
such change in operating mode.
15.2.4
There are four prescaler settings specified by bits
CCP1M3:CCP1M0. Whenever the CCP1 module is
turned off, or the CCP1 module is not in Capture mode,
the prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 15-1 shows the recom-
mended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
FIGURE 15-1:
 2004 Microchip Technology Inc.
CCP1 pin
SOFTWARE INTERRUPT
CCP1 PRESCALER
Note: I/O pins have diode protection to V
CAPTURE MODE OPERATION BLOCK DIAGRAM
Edge Detect
Qs
Prescaler
1, 4, 16
and
CCP1CON<3:0>
Set Flag bit CCP1IF
(PIR1<2>)
DD
and V
T3ECCP1
T3ECCP1
T3CCP1
T3CCP1
SS
.
15.2.5
The CAN capture event occurs when a message is
received in either of the receive buffers. The CAN
module provides a rising edge to the CCP1 module to
cause a capture event. This feature is provided to
time-stamp the received CAN messages.
This feature is enabled by setting the CANCAP bit of
the CAN I/O control register (CIOCON<4>). The
message receive signal from the CAN module then
takes the place of the events on RC2/CCP1.
EXAMPLE 15-1:
CLRF
MOVLW
MOVWF
CCP1CON, F
NEW_CAPT_PS
CCP1CON
CAN MESSAGE TIME-STAMP
TMR1
Enable
TMR3
Enable
CCPR1H
TMR3H
TMR1H
CHANGING BETWEEN
CAPTURE PRESCALERS
PIC18FXX8
; Turn CCP module off
; Load WREG with the
; new prescaler mode
; value and CCP ON
; Load CCP1CON with
; this value
CCPR1L
TMR1L
TMR3L
DS41159D-page 125