PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 314

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PIC18F4580-I/P

Manufacturer Part Number
PIC18F4580-I/P
Description
40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4580-I/P

A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8 bit, 3-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS41159D-page 312
PIC18FXX8
Q Cycle Activity:
After Interrupt
operation
Decode
No
PC
W
BSR
Status
GIE/GIEH, PEIE/GIEL
Q1
operation
operation
Return from Interrupt
[ label ]
s
(TOS)
1
if s = 1
(WS)
(STATUSS)
(BSRS)
PCLATU, PCLATH are unchanged.
GIE/GIEH, PEIE/GIEL.
Return from interrupt. Stack is popped
and Top-of-Stack (TOS) is loaded into
the PC. Interrupts are enabled by
setting either the high or low priority
global interrupt enable bit. If ‘s’ = 1, the
contents of the shadow registers WS,
STATUSS and BSRS are loaded into
their corresponding registers W, Status
and BSR. If ‘s’ = 0, no update of these
registers occurs (default).
1
2
RETFIE 1
0000
No
No
Q2
[0,1]
GIE/GIEH or PEIE/GIEL,
W,
PC,
RETFIE [s]
BSR,
0000
operation
operation
=
=
=
=
=
Status,
No
No
Q3
TOS
WS
BSRS
STATUSS
1
0001
Pop PC from
Set GIEH or
operation
stack
GIEL
No
Q4
000s
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
TABLE
Q Cycle Activity:
:
:
:
CALL TABLE ; W contains table
ADDWF PCL
RETLW k0
RETLW k1
RETLW kn
Before Instruction
After Instruction
operation
Decode
No
Q1
W
W
operation
; offset value
; W now has
; table value
; W = offset
; Begin table
;
; End of table
=
=
literal ‘k’
Return Literal to W
[ label ]
0
k
(TOS)
PCLATU, PCLATH are unchanged
None
W is loaded with the eight-bit literal ‘k’.
The program counter is loaded from the
top of the stack (the return address).
The high address latch (PCLATH)
remains unchanged.
1
2
Read
No
Q2
0000
k
0x07
value of kn
W,
 2004 Microchip Technology Inc.
255
PC,
RETLW k
1100
operation
Process
Data
No
Q3
kkkk
from stack,
Write to W
operation
Pop PC
No
Q4
kkkk

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