PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 249
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PIC18F4580-I/P
Manufacturer Part Number
PIC18F4580-I/P
Description
40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4580-IP.pdf
(402 pages)
Specifications of PIC18F4580-I/P
A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8 bit, 3-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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20.4
Figure 20-4 shows the operation of the A/D converter
after the GO bit has been set. Clearing the GO/DONE
bit during a conversion will abort the current conver-
sion. The A/D Result register pair will not be updated
with the partially completed A/D conversion sample.
That is, the ADRESH:ADRESL registers will continue
to contain the value of the last completed conversion
(or the last value written to the ADRESH:ADRESL
registers). After the A/D conversion is aborted, a 2 T
wait is required before the next acquisition is started.
After this 2 T
channel is automatically started.
FIGURE 20-3:
2004 Microchip Technology Inc.
Note:
A/D Conversions
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
AD
7
0000 00
wait, acquisition on the selected
ADRESH
A/D RESULT JUSTIFICATION
Right Justified
2 1 0 7
ADFM = 1
10-bit Result
ADRESL
0
AD
10-bit Result
20.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16 bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
Format Select bit (ADFM) controls this justification.
Figure 20-3 shows the operation of the A/D result justi-
fication. The extra bits are loaded with ‘0’s. When an
A/D result will not overwrite these locations (A/D
disable), these registers may be used as two general
purpose 8-bit registers.
7
ADRESH
10-bit Result
A/D RESULT REGISTERS
ADFM = 0
Left Justified
0 7 6 5
PIC18FXX8
ADRESL
0000 00
DS41159D-page 247
0
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