PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 258

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

FIGURE 22-1:
22.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 22-1) keep V
ence source rails. The voltage reference is derived
from the reference source; therefore, the V
changes with fluctuations in that source. The absolute
accuracy of the voltage reference can be found in
Section 27.0 “Electrical Characteristics”.
22.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
DS41159D-page 256
PIC18FXX8
CVREN
Voltage Reference Accuracy/Error
Operation During Sleep
RA0/AN0/CV
or CV
CVRSS = 1
REF
of Comparator
V
REF
REF
DD
VOLTAGE REFERENCE BLOCK DIAGRAM
V
from approaching the refer-
REF
CVRSS = 0
+
8R
R
REF
output
R
16-to-1 Analog MUX
16 Stages
register). The CVRSS value select bits, CVRCON<3:0>,
22.4
A device Reset disables the voltage reference by
clearing bit CVREN (CVRCON register). This Reset
also disconnects the reference from the RA2 pin by
clearing bit CVROE (CVRCON register) and selects the
high-voltage range by clearing bit CVRR (CVRCON
are also cleared.
22.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA0/AN0 pin if the
TRISA<0> bit is set and the CVROE bit (CVRCON<6>)
is set. Enabling the voltage reference output onto the
RA0/AN0 pin, with an input signal present, will increase
current consumption. Connecting RA0/AN0 as a digital
output, with CVRSS enabled, will also increase current
consumption.
The RA0/AN0 pin can be used as a simple D/A output
with limited drive capability. Due to the limited current
drive capability, a buffer must be used on the voltage
reference output for external connections to V
Figure 22-2 shows an example buffering technique.
R
Effects of a Reset
Connection Considerations
R
 2004 Microchip Technology Inc.
8R
CVR3
CVR0
(From CVRCON<3:0>)
CVRR
RA2/AN2/V
CVRSS = 1
CVRSS = 0
REF
REF
-
.