PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 269

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PIC18F4580-I/P

Manufacturer Part Number
PIC18F4580-I/P
Description
40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4580-I/P

A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8 bit, 3-16 bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
REGISTER 24-3:
REGISTER 24-4:
 2004 Microchip Technology Inc.
bit 7-4
bit 3-1
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
bit 7
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
CONFIG2H: CONFIGURATION REGISTER 2 HIGH (BYTE ADDRESS 300003h)
Unimplemented: Read as ‘0’
WDTPS2:WDTPS0: Watchdog Timer Postscale Select bits
111 = 1:128
110 = 1:64
101 = 1:32
100 = 1:16
011 = 1:8
010 = 1:4
001 = 1:2
000 = 1:1
WDTEN: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled (control is placed on the SWDTEN bit)
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
DEBUG: Background Debugger Enable bit
1 = Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
Unimplemented: Read as ‘0’
LVP: Low-Voltage ICSP Enable bit
1 = Low-Voltage ICSP enabled
0 = Low-Voltage ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack Full/Underflow will cause Reset
0 = Stack Full/Underflow will not cause Reset
DEBUG
Note:
R/P-1
U-0
The Watchdog Timer postscale select bits configuration used in the PIC18FXXX
devices has changed from the configuration used in the PIC18CXXX devices.
U-0
U-0
C = Clearable bit
P = Programmable bit
U-0
U-0
U-0
U-0
WDTPS2
R/P-1
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
WDTPS1
R/P-1
R/P-1
LVP
PIC18FXX8
WDTPS0
R/P-1
U-0
DS41159D-page 267
STVREN
WDTEN
R/P-1
R/P-1
bit 0
bit 0

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