PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 115

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

12.0
The Timer1 module timer/counter has the following
features:
• 16-bit timer/counter
• Readable and writable (both registers)
• Internal or external clock select
• Interrupt-on-overflow from FFFFh to 0000h
• Reset from CCP module special event trigger
REGISTER 12-1:
 2004 Microchip Technology Inc.
(two 8-bit registers: TMR1H and TMR1L)
TIMER1 MODULE
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
T1CON: TIMER1 CONTROL REGISTER
bit 7
RD16: 16-bit Read/Write Mode Enable bit
1 = Enables register read/write of Timer1 in one 16-bit operation
0 = Enables register read/write of Timer1 in two 8-bit operations
Unimplemented: Read as ‘0’
T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T1OSCEN: Timer1 Oscillator Enable bit
1 = Timer1 oscillator is enabled
0 = Timer1 oscillator is shut-off
The oscillator inverter and feedback resistor are turned off to eliminate power drain.
T1SYNC: Timer1 External Clock Input Synchronization Select bit
When TMR1CS = 1:
When TMR1CS = 0:
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
TMR1CS: Timer1 Clock Source Select bit
1 = External clock from pin RC0/T1OSO/T1CKI (on the rising edge)
0 = Internal clock (F
TMR1ON: Timer1 On bit
1 = Enables Timer1
0 = Stops Timer1
Legend:
R = Readable bit
-n = Value at POR
1 = Do not synchronize external clock input
0 = Synchronize external clock input
R/W-0
RD16
U-0
—
OSC
T1CKPS1 T1CKPS0 T1OSCEN
/4)
R/W-0
W = Writable bit
‘1’ = Bit is set
R/W-0
Register 12-1 shows the Timer1 Control register. This
register controls the operating mode of the Timer1
module, as well as contains the Timer1 Oscillator
Enable bit (T1OSCEN). Timer1 can be enabled/
disabled by setting/clearing control bit, TMR1ON
(T1CON register).
Figure 12-1 is a simplified block diagram of the Timer1
module.
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
Timer1 is disabled on POR.
T1SYNC
R/W-0
PIC18FXX8
x = Bit is unknown
TMR1CS
R/W-0
DS41159D-page 113
TMR1ON
R/W-0
bit 0