CS1D-DPL02D Omron, CS1D-DPL02D Datasheet - Page 406

• Manufacturer Part Number: CS1D-DPL02D
• Description: CS1D Dual IO Exp
• Manufacturer: Omron

Specifications of CS1D-DPL02D

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9-5-11 Logic Instructions
9-5-12 Special Math Instructions
Instruction Execution Times and Number of Steps
LOGICAL AND ANDW
DOUBLE LOG-
ICAL AND
LOGICAL OR
DOUBLE LOG-
ICAL OR
EXCLUSIVE
OR
DOUBLE
EXCLUSIVE
OR
EXCLUSIVE
NOR
DOUBLE
EXCLUSIVE
NOR
COMPLEMENT COM
DOUBLE COM-
PLEMENT
BINARY ROOT ROTB
BCD SQUARE
ROOT
ARITHMETIC
PROCESS
FLOATING
POINT DIVIDE
BIT COUNTER BCNT
Instruction
Instruction
ANDL
ORW
ORWL
XORW
XORL
XNRW
XNRL
COML
ROOT
APR
FDIV
Mnemonic
Mnemonic
Note
Note When a double-length operand is used, add 1 to the value shown in the length
Note When a double-length operand is used, add 1 to the value shown in the length
034
610
035
611
036
612
037
613
029
614
620
072
069
079
067
Code
Code
1. When a double-length operand is used, add 1 to the value shown in the
2. Not supported by Duplex CPU Systems.
column in the following table.
column in the following table.
length column in the following table.
4
4
4
4
4
4
4
4
2
2
3
3
4
4
4
Length
Length
(steps)
(steps)
0.18
0.32
0.22
0.32
0.22
0.32
0.22
0.32
0.22
0.40
49.6
13.7
6.7
17.2
116.6
0.3
CPU6@H
CPU6@H
(Duplex
(Duplex
CPU)
CPU)
Execution time ( s)
Execution time ( s)
0.18
0.32
0.22
0.32
0.22
0.32
0.22
0.32
0.22
0.40
49.6
13.7
6.7
17.2
116.6
0.3
CPU6@S
CPU6@S
(Single
(Single
CPU)
CPU)
0.20
0.34
0.32
0.34
0.32
0.34
0.32
0.34
0.32
0.56
50.0
13.9
6.9
18.4
176.6
0.38
CPU4@S
CPU4@S
(Single
(Single
CPU)
CPU)
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Designating SIN
and COS
Designating line-
segment approxi-
mation
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Counting 1 word
Conditions
Conditions
Section 9-5
371