CS1D-DPL02D Omron, CS1D-DPL02D Datasheet - Page 340

• Manufacturer Part Number: CS1D-DPL02D
• Description: CS1D Dual IO Exp
• Manufacturer: Omron

Specifications of CS1D-DPL02D

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timer Area
8-13 Timer Area
Note
Note A TR bit is not required when there are no execution conditions after the
branch point or there is an execution condition only in the last line of the
instruction block.
The 4,096 timer numbers (T0000 to T4095) are shared by the TIM, TIMX,
TIMH(015), TIMHX(551), TMHH(540), TMHHX(552), TTIM(087),
TTIMX(555), TIMW(813), TIMWX(816), TMHW(815), and TMHWX(817)
instructions. Timer Completion Flags and present values (PVs) for these
instructions are accessed with the timer numbers. (The TIML(542),
TIMLX(553), MTIM(543), and MTIMX(554) instructions do not use timer num-
bers.)
When a timer number is used in an operand that requires bit data, the timer
number accesses the Completion Flag of the timer. When a timer number is
used in an operand that requires word data, the timer number accesses the
PV of the timer. Timer Completion Flags can be used as often as necessary
as normally open and normally closed conditions and the values of timer PVs
can be read as normal word data.
With CS1D CPU Units, the refresh method for timer PVs can be set from the
CX-Programmer to either BCD or binary.
1. It is not recommended to use the same timer number in two timer instruc-
2. The accuracy of timers is different for Duplex CPU Systems than for Single
tions because the timers will not operate correctly if they are timing simul-
taneously.
(If two or more timer instructions use the same timer number, an error will
be generated during the program check, but the timers will operate as long
as the instructions are not executed in the same cycle.)
CPU Systems or CS1-H CPU Units.
000001
000002
000001
000003
Instruction
Instruction
LD
OUT
AND
OUT
LD
OUT
OUT
Operand
Operand
000000
000001
000002
000000
000001
000002
000003
Section 8-13
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