HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 848

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF240DV
Manufacturer:
HITACHI
Quantity:
7 287
Section 16 Serial Communication Interface with FIFO (SCIF)
Serial Data Transmission: Figure 16.7 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Rev.7.00 Oct. 10, 2008 Page 762 of 1074
REJ09B0366-0700
read 1 from TDFE flag and TEND
trigger set number) to SCFTDR2,
Write transmit data (16 - transmit
flag in SCFSR2, then clear to 0
Clear TE bit in SCSCR2 to 0
Read TEND flag in SCFSR2
Read TDFE flag in SCFSR2
Clear SPB2DT to 0 and
All data transmitted?
Start of transmission
End of transmission
set SPB2IO to 1
Break output?
TEND = 1?
TDFE = 1?
Yes
Yes
Yes
Yes
Figure 16.7 Sample Serial Transmission Flowchart
No
No
No
No
1. SCIF status check and transmit data
2. Serial transmission continuation
3. Break output at the end of serial
write:
Read SCFSR2 and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR2, read 1
from the TDFE and TEND flags, then
clear these flags to 0.
The number of transmit data bytes
that can be written is 16 - (transmit
trigger set number).
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR2, and then clear the TDFE
flag to 0.
transmission:
To output a break in serial
transmission, clear the SPB2DT bit to
0 and set the SPB2IO bit to 1 in
SCSPTR2, then clear the TE bit in
SCSCR2 to 0.
In steps 1 and 2, it is possible to
ascertain the number of data bytes
that can be written from the number
of transmit data bytes in SCFTDR2
indicated by the upper 8 bits of
SCFDR2.

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