HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 576

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number:
HD6417750RF240DV
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7 287
Section 13 Bus State Controller (BSC)
value to set a short refresh request generation interval just while these dummy cycles are being
executed. With simple read or write access, the address counter in the synchronous DRAM used
for auto-refreshing is not initialized, and so the cycle must always be an auto-refresh cycle. After
auto-refreshing has been executed at least the prescribed number of times, a mode register setting
command is issued in the TMw1 cycle by setting MCR.MRSET to 1 and performing a write to
address H'FF900000 + X or H'FF940000 + X.
Synchronous DRAM mode register setting should be executed once only after power-on (reset)
and before synchronous DRAM access, and no subsequent changes should be made.
Rev.7.00 Oct. 10, 2008 Page 490 of 1074
REJ09B0366-0700
CKIO
Bank
Precharge-sel
Address
CSn
RD/WR
RAS
CASS
D63–D0
CKE
Figure 13.42 (1) Synchronous DRAM Mode Write Timing (PALL)
TRp1
(High)
TRp2
TRp3
TRp4
TMw1
TMw2
TMw3
TMw4
TMw5

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