HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 454

• Manufacturer Part Number: HD6417750RF240DV
• Description: MPU 3V 16K I-TEMP,PB-FREE 208-QF
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF240DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Bus State Controller (BSC)
memory control register (MCR). When the DRAM interface is used for area 2 or 3, a bus width of
16 or 32 bits should be set. For the synchronous DRAM interface, set a bus width of 32 or 64 bits
in the MCR register.
When using the PCMCIA interface, set a bus width of 8 or 16 bits.
For details, see section 13.3.7, PCMCIA Interface.
When using port functions, set a bus width of 8, 16, or 32 bits for all areas.
For details, see section 13.2.2, Bus Control Register 2 (BCR2), and section 13.2.8, Memory
Control Register (MCR).
The area 7 address range, H'1C000000 to H'1FFFFFFFF, is a reserved space and must not be used.
Note: * SH7750R only
13.1.6
This LSI supports PCMCIA compliant interface specifications for external memory space areas 5
and 6.
The interfaces supported are the IC memory card interface and I/O card interface stipulated in
JEIDA specifications version 4.2 (PCMCIA2.1).
External memory space areas 5 and 6 support both the IC memory card interface and the I/O card
interface.
The PCMCIA interface is supported only in little-endian mode.
Table 13.4 PCMCIA Interface Features
Item
Access
Data bus
Memory type
Common memory capacity
Attribute memory capacity
Others
Rev.7.00 Oct. 10, 2008 Page 368 of 1074
REJ09B0366-0700
PCMCIA Support
Features
Random access
8/16 bits
Mask ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Max. 64 Mbytes
Max. 64 Mbytes
Dynamic bus sizing for I/O bus width, access to PCMCIA interface
from address translation areas