HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 562

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF240DV
Manufacturer:
HITACHI
Quantity:
7 287
Section 13 Bus State Controller (BSC)
different area during this time has no effect. If there is an access to a different row address in the
bank active state, after this is detected the bus cycle in figure 13.34 or 13.37 is executed instead of
that in figure 13.33 or 13.36. In RAS down mode, too, a PALL command is issued before a refresh
cycle or before bus release due to bus arbitration.
Rev.7.00 Oct. 10, 2008 Page 476 of 1074
REJ09B0366-0700
CKIO
Bank
Precharge-sel
Address
CSn
RD/WR
RAS
CASS
DQMn
D63–D0
(read)
BS
CKE
DACKn
(SA: IO ← memory)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Tr
Row
Row
Row
Trw
Figure 13.32 Burst Read Timing
Tc1
Tc2
H/L
c1
Tc3 Tc4/Td1 Td2
c1
c2
Td3
c3
Td4
c4

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