HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 815

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF240DV
Manufacturer:
HITACHI
Quantity:
7 287
16.1.4
The SCIF has the internal registers shown in table 16.2. These registers are used to specify the
data format and bit rate, and to perform transmitter/receiver control.
Table 16.2 SCIF Registers
Name
Serial mode register
Bit rate register
Serial control register
Transmit FIFO data register SCFTDR2 W
Serial status register
Receive FIFO data register SCFRDR2 R
FIFO control register
FIFO data count register
Serial port register
Line status register
Notes: 1. Only 0 can be written, to clear flags. Bits 15 to 8, 3, and 2 are read-only, and cannot be
16.2
16.2.1
SCRSR2 is the register used to receive serial data.
The SCIF sets serial data input from the RxD2 pin in SCRSR2 in the order received, starting with
the LSB (bit 0), and converts it to parallel data. When one byte of data has been received, it is
transferred to the receive FIFO register, SCFRDR2, automatically.
2. The value of bits 6, 4, and 0 is undefined.
3. Only 0 can be written, to clear flags. Bits 15 to 1 are read-only, and cannot be modified.
Register Configuration
Register Descriptions
Receive Shift Register (SCRSR2)
modified.
R/W:
Bit:
7
Abbrevia-
tion
SCSMR2
SCBRR2
SCSCR2
SCFSR2
SCFCR2
SCFDR2
SCSPTR2 R/W
SCLSR2
6
Section 16 Serial Communication Interface with FIFO (SCIF)
R/W
R/W
R/W
R/W
R/(W) *
R/W
R
R/(W) *
5
1
3
Initial
Value
H'0000
H'FF
H'0000
Undefined H'FFE8000C H'1FE8000C 8
H'0060
Undefined H'FFE80014 H'1FE80014 8
H'0000
H'0000
H'0000 *
H'0000
4
Rev.7.00 Oct. 10, 2008 Page 729 of 1074
2
P4
Address
H'FFE80000 H'1FE80000 16
H'FFE80004 H'1FE80004 8
H'FFE80008 H'1FE80008 16
H'FFE80010 H'1FE80010 16
H'FFE80018 H'1FE80018 16
H'FFE8001C H'1FE8001C 16
H'FFE80020 H'1FE80020 16
H'FFE80024 H'1FE80024 16
3
2
Area 7
Address
REJ09B0366-0700
1
Access
Size
0

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