HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 492

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF240DV
Manufacturer:
HITACHI
Quantity:
7 287
Section 13 Bus State Controller (BSC)
Bits 8 and 7—Memory Data Size (SZ1, SZ0): These bits specify the bus width of DRAM and
synchronous DRAM. This setting has priority over the BCR2 register setting.
Bit 8: SZ1
0
1
Bits 6 to 3—Address Multiplexing (AMXEXT, AMX2–AMX0): These bits specify address
multiplexing for DRAM and synchronous DRAM. The address shift value is different for the
DRAM interface and the synchronous DRAM interface.
• For DRAM Interface:
0*
Note:
Rev.7.00 Oct. 10, 2008 Page 406 of 1074
REJ09B0366-0700
Bit 6:
AMXEXT
*
When the DRAM interface is used, clear the AMXEXT bit to 0.
0
1
Bit 5:
AMX2
Bit 7: SZ0
0
1
0
1
Bit 4:
AMX1
0
1
0
1
DRAM
64 bits
Reserved (Setting prohibited)
16 bits
32 bits
0
1
0
1
0
1
0
1
Bit 3:
AMX0
8-bit column address product
9-bit column address product
10-bit column address product
11-bit column address product
12-bit column address product
Reserved (Setting prohibited)
Reserved (Setting prohibited)
Reserved (Setting prohibited)
Description
DRAM
Description
SDRAM
64 bits
Reserved (Setting prohibited)
Reserved (Setting prohibited)
32 bits
(Initial value)

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