DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 81
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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2.6.5
The BSET, BCLR, BNOT, BST, and BIST instructions read a byte of data, modify a bit in the
byte, then write the byte back. Care is required when these instructions are used to access registers
with write-only bits, or to access ports.
Example 1: BCLR is executed to clear bit 0 in the port 4 data direction register (P4DDR) under
the following conditions.
P4
P4
The intended purpose of this BCLR instruction is to switch P4
Step
1
2
3
Operation field only
Operation field and register fields
Operation field, register fields, and effective address extension
Operation field, effective address extension, and condition field
7
5
, P4
– P4
6
:
Read
Modify
Write
0
op
: Output pins
Notes on Use of Bit Manipulation Instructions
Input pins
op
op
Description
Read one data byte at the specified address
Modify one bit in the data byte
Write the modified data byte back to the specified address
cc
EA (disp)
Figure 2.9 Instruction Formats
op
rn
rn
EA (disp)
Rev. 2.00 Sep 20, 2005 page 41 of 800
rm
rm
0
from output to input.
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm
BRA d:8
REJ09B0260-0200
Section 2 CPU
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