DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 768
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 768 of 843
- Download datasheet (5Mb)
Appendix B Internal I/O Registers
8TCSR1—Timer Control/Status Register 1
Rev. 2.00 Sep 20, 2005 page 728 of 800
REJ09B0260-0200
Note: * Only 0 can be written to bits 7 to 5 to clear these flags.
Initial value
Read/Write
Bit
Compare match/input capture flag B
0
1
R/(W) *
CMFB
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB.
[Setting conditions]
8TCNT = TCORB
• The 8TCNT value is transferred to TCORB by an input capture signal when
7
0
TCORB functions as an input capture register.
Compare match/input capture flag A
0
1
R/(W) *
CMFA
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA.
[Setting condition]
8TCNT = TCORA
6
0
Timer overflow flag
0
1
R/(W) *
OVF
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF.
[Setting condition]
8TCNT overflows from H'FF to H'00.
5
0
Input capture enable
R/W
ICE
4
0
0
1
Output/input capture edge select B3 and B2
8TCSR1
TCORB is a compare match register
TCORB is an input capture register
ICE in
OIS3
0
R/W
1
3
0
H'FFF83
OIS3
Bit 3
Output select A1 and A0
0
1
0
1
Bit 1
OS1
OIS2
0
1
R/W
2
0
OIS2
Bit 2
Bit 0
OS0
0
1
0
1
0
1
0
1
0
1
0
1
TCORB input capture on rising edge
TCORB input capture on falling edge
TCORB input capture on both rising
and falling edges
No change at compare match B
0 output at compare match B
1 output at compare match B
Output toggles at compare match B
No change at compare match A
0 output at compare match A
1 output at compare match A
Output toggles at compare match A
OS1
R/W
1
0
Description
OS0
R/W
0
0
Description
8-bit timer channel 1
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