DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 614
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 614 of 843
- Download datasheet (5Mb)
Section 18 Flash Memory [H8/3024F-ZTAT Version]
4. Do not apply a constant high level to the FWE pin.
5. Use the recommended algorithm when programming and erasing flash memory.
6. Do not set or clear the SWE bit during execution of a program in flash memory.
Rev. 2.00 Sep 20, 2005 page 574 of 800
REJ09B0260-0200
• In user program mode, FWE can be switched between high and low level regardless of
• Do not apply FWE if program runaway has occurred.
• Disconnect FWE only when the SWE, ESU, PSU, EV, PV, E, and P bits in FLMCR1 are
T prevent erroneous programming or erasing due to program runaway, etc., apply a high level
to the FWE pin only when programming or erasing flash memory (including execution of flash
memory emulation using RAM). A system configuration in which a high level is constantly
applied to the FWE pin should be avoided. Also, while a high level is applied to the FWE pin,
the watchdog timer should be activated to prevent overprogramming or overerasing due to
program runaway, etc.
The recommended algorithm enables programming and erasing to be carried out without
subjecting the device to voltage stress or sacrificing program data reliability. When setting the
P or E bit in FLMCR1, the watchdog timer should be set beforehand as a precaution against
program runaway, etc.
Also note that access to the flash memory space by means of a MOV instruction, etc., is not
permitted while the P bit or E bit is set.
Clear the SWE bit before executing a program or reading data in flash memory. When the
SWE bit is set, data in flash memory can be rewritten, but flash memory should only be
accessed for verify operations (verification during programming/erasing).
Similarly, when using the RAM emulation function while a high level is being input to the
FWE pin, the SWE bit must be cleared before executing a program or reading data in flash
memory. However, the RAM area overlapping flash memory space can be read and written to
regardless of whether the SWE bit is set or cleared.
A wait time is necessary after the SWE bit is cleared. For details see table 21.19 in section
21.2.6, Flash Memory Characteristics.
In a reset during operation, the
clock cycles.
R E S
FWE input can also be switched during execution of a program in flash memory.
During FWE application, the program execution state must be monitored using the
watchdog timer or some other means.
cleared.
Make sure that the SWE, ESU, PSU, EV, PV, E, and P bits are not set by mistake when
applying or disconnecting FWE.
input.
R E S
pin must be held low for a minimum of 20 system
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