DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 752
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Appendix B Internal I/O Registers
FLMSR-Flash Memory Status Register
Rev. 2.00 Sep 20, 2005 page 712 of 800
REJ09B0260-0200
Bit
Initial value
R/W
Flash memory error
Notes: 1.
FLER
Bit 7
0
1
FLER
R
0
7
2.
3.
H8/3024F-ZTAT
H8/3026F-ZTAT
H8/3024 mask ROM version
H8/3026 mask ROM version
Flash memory program/erase protection (error protection *
[Clearing condition]
WDT reset, reset via the RES pin, or hardware standby mode
An error has occurred during flash memory programming/erasing, and error pro-
tection *
[Setting conditions]
• When flash memory is read *
• Immediately after the start of exception handling during programming/erasing
• When a SLEEP instruction (including software standby) is executed during
• When the bus is released during programming/erasing
See 17.7.3, Error Protection, for details.
The read value in this case is undefined.
Before the exception handling stack or vector read is performed.
read or instruction fetch, but excluding reads in a RAM area overlapping flash
memory space)
(but excluding reset, illegal instruction, trap instruction, and division-by-zero
exception handling) *
programming/erasing
—
1
—
6
1
is enabled
—
—
5
1
3
—
—
4
1
2
This register provided
This register not provided
(FLER bit in FLMCR2)
This register not provided
during programming/erasing (including a vector
Reserved bits
Description
H'EE07D
—
—
3
1
—
—
2
1
1
) is disabled (Initial value)
—
—
1
1
Flash Memory
—
—
0
1
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