DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 436
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 12 Serial Communication Interface
Rev. 2.00 Sep 20, 2005 page 396 of 800
REJ09B0260-0200
Figure 12.12 Sample Flowchart for Receiving Multiprocessor Serial Data
No
No
No
Read ORER and FER flags
Read receive data from RDR
Read ORER and FER flags
Set MPIE bit to 1 in SCR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
Finished receiving?
FER
FER
Start receiving
RDRF = 1
RDRF = 1
Own ID?
Initialize
in SSR
in SSR
<End>
ORER = 1
ORER = 1
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error handling
(1)
(2)
(3)
(continued on next page)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
SCI initialization:
the receive data input function of the
RxD pin is selected automatically.
ID receive cycle:
set the MPIE bit to 1 in SCR.
SCI status check and ID check:
read SSR, check that the RDRF flag
is set to 1, then read data from RDR
and compare it with the processor's
own ID. If the ID does not match, set
the MPIE bit to 1 again and clear the
RDRF flag to 0. If the ID matches,
clear the RDRF flag to 0.
SCI status check and data receiving:
read SSR, check that the RDRF flag
is set to 1, then read data from RDR.
Receive error handling and break
detection:
if a receive error occurs, read the
ORER and FER flags in SSR to
identify the error. After executing the
necessary error handling, clear the
ORER and FER flags both to 0.
Receiving cannot resume while either
the ORER or FER flag remains set to
1. When a framing error occurs, the
RxD pin can be read to detect the
break state.
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