DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 421
![MCU 3V 256K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Asynchronous Mode
Synchronous Mode
Smart Card Interface
Data length is selectable: 7 or 8 bits
Parity and multiprocessor bits are selectable, and so is the stop bit length (1 or 2 bits). These
selections determine the communication format and character length.
In receiving, it is possible to detect framing errors, parity errors, overrun errors, and the break
state.
An internal or external clock can be selected as the SCI clock source.
The communication format has a fixed 8-bit data length.
In receiving, it is possible to detect overrun errors.
An internal or external clock can be selected as the SCI clock source.
One frame consists of 8-bit data and a parity bit.
In transmitting, a guard time of at least two elementary time units (2 etu) is provided between
the end of the parity bit and the start of he next frame. (An elementary time unit is the time
required to transmit one bit.)
In receiving, if a parity error is detected, a low error signal level is output for 1 etu, beginning
10.5 etu after the start bit..
In transmitting, if an error signal is received, the same data is automatically transmitted again
after at least 2 etu.
Only asynchronous communication is supported. There is no synchronous communication
function.
For details of smart card interface operation, see section 13, Smart Card Interface.
When an internal clock is selected, the SCI operates using the on-chip baud rate generator,
and can output a serial clock signal with a frequency matching the bit rate.
When an external clock is selected, the external clock input must have a frequency 16 times
the bit rate. (The on-chip baud rate generator is not used.)
When an internal clock is selected, the SCI operates using the on-chip baud rate generator,
and can output a serial clock signal to external devices.
When an external clock is selected, the SCI operates on the input serial clock. The on-chip
baud rate generator is not used.
Section 12 Serial Communication Interface
Rev. 2.00 Sep 20, 2005 page 381 of 800
REJ09B0260-0200
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