AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 66

• Manufacturer Part Number: AM186ES
• Description: microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
• Manufacturer: Advanced Micro Devices

4.1.4
Figure 4-4
4-6
Auxiliary Configuration Register
(AUXCON, Offset F2h)
The auxiliary configuration register is used to configure the asynchronous serial port flow-
control signals and to configure the data bus width for memory and I/O accesses. The
format of the auxiliary configuration register is shown in Figure 4-4.
Auxiliary Configuration Register
The reset value of this register is 0000h.
Bits 15–7: Reserved
Bit 6: Serial Port 1 Enable Receiver Request (ENRX1)—When this bit is 1, the CTS1/
ENRX1 pin is configured as ENRX1. When this bit is 0, the CTS1/ENRX1 pin is configured
as CTS1. This bit is 0 after processor reset.
Bit 5: Serial Port 1 Request to Send (RTS1)—When this bit is 1, the RTR1/RTS1 pin is
configured as RTS1. When this bit is 0, the RTR1/RTS1 pin is configured as RTR1. This
bit is 0 after processor reset.
Bit 4: Serial Port 0 Enable Receiver Request (ENRX0)—When this bit is 1, the CTS0/
ENRX0 pin is configured as ENRX0. When this bit is 0, the CTS0/ENRX0 pin is configured
as CTS0. This bit is 0 after processor reset.
Bit 3: Serial Port 0 Request to Send (RTS0)—When this bit is 1, the RTR0/RTS0 pin is
configured as RTS0. When this bit is 0, the RTR0/RTS0 pin is configured as RTR0. This
bit is 0 after processor reset.
Bit 2: LCS Data Bus Size (LSIZ)—(Am186ES microcontroller only) This bit determines
the width of the data bus for accesses to LCS space. If this bit is 1, 8-bit accesses are
performed. If this bit is 0, 16-bit accesses are performed. This bit should not be modified
while executing from LCS space or while the PCB is overlaid with LCS space. This bit is 0
after processor reset.
Bit 1: Midrange Data Bus Size (MSIZ)—(Am186ES microcontroller only) This bit
determines the width of the data bus for memory accesses which do not fall into the UCS
or LCS address spaces, including MCS address space and PCS address space, if mapped
to memory. If this bit is 1, 8-bit accesses are performed. If this bit is 0, 16-bit accesses are
performed. This bit should not be modified while executing from the associated address
space or while the PCB is overlaid on this address space. This bit is 0 after processor reset.
Bit 0: I/O Space Data Bus Size (IOSIZ)—(Am186ES microcontroller only) This bit
determines the width of the data bus for all I/O space accesses. If this bit is 1, 8-bit accesses
are performed. If this bit is 0, 16-bit accesses are performed. This bit is 0 after processor
reset. This bit should not be modified while the PCS is located in I/O space.
15
Reserved
Peripheral Control Block
ENRX1
7
RTS1
ENRX0
RTS0
LSIZ
MSIZ
IOSIZ
0