AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 122

• Manufacturer Part Number: AM186ES
• Description: microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
• Manufacturer: Advanced Micro Devices

7.4.8
Figure 7-23
7-34
Interrupt Mask Register
(IMASK, Offset 28h)
(Slave Mode)
The format of the Interrupt Mask register is shown in Figure 7-23. The Interrupt Mask register
is a read/write register. Programming a bit in the Interrupt Mask register has the effect of
programming the MSK bit in the associated control register.
Interrupt Mask Register
The IMASK register is set to 003Dh on reset.
Bits 15–6: Reserved
Bits 5–4: Timer 2/Timer 1 Interrupt Mask (TMR2–TMR1)—These bits indicate the state
of the mask bit of the Timer Interrupt Control register and when set to a 1, indicate which
source has its interrupt requests masked.
Bits 3–2: DMA Channel Interrupt Mask (D1/I6–D0/I5)—These bits indicate the state of
the mask bits of the corresponding DMA channel INT5/INT6 control register.
Bit 1: Reserved
Bit 0: Timer 0 Interrupt Mask (TMR0)—This bit indicates the state of the mask bit of the
timer interrupt control register and when set to a 1, indicates timer 0 has its interrupt request
masked.
15
Reserved
Interrupt Control Unit
7
TMR2
TMR1
D1/I6
D0/I5
Res
TMR0
0