AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 33

• Manufacturer Part Number: AM186ES
• Description: microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
• Manufacturer: Advanced Micro Devices

3.1
CHAPTER
3
SYSTEM OVERVIEW
This chapter contains descriptions of the Am186ES and Am188ES microcontroller pins,
the bus interface unit, the clock and power management unit, and power-save operation.
PIN DESCRIPTIONS
Pin Terminology
The following terms are used to describe the pins:
Input—An input-only pin.
Output—An output-only pin.
Input/Output—A pin that can be either input or output.
Synchronous—Synchronous inputs must meet setup and hold times in relation to
CLKOUTA. Synchronous outputs are synchronous to CLKOUTA.
Asynchronous—Inputs or outputs that are asynchronous to CLKOUTA.
A19–A0
AD15–AD8
Address Bus (output, three-state, synchronous)
(A19/PIO9, A18/PIO8, A17/PIO7)
These pins supply nonmultiplexed memory or I/O addresses to the
system one half of a CLKOUTA period earlier than the multiplexed
address and data bus (AD15–AD0 on the 186 or AO15–AO8 and AD7–
AD0 on the 188). During a bus hold or reset condition, the address bus
is in a high-impedance state.
Address and Data Bus, Am186ES Microcontroller Only
(input/output, three-state, synchronous, level-sensitive)
AD15–AD8—On the Am186ES microcontroller, these time-multiplexed
pins supply memory or I/O addresses and data to the system. This bus
can supply an address to the system during the first period of a bus
cycle (t
of that cycle (t
The address phase of these pins can be disabled. See the ADEN
description with the BHE/ADEN pin. When WHB is deasserted, these
pins are three-stated during t
During a bus hold or reset condition, the address and data bus is in a
high-impedance state.
During a power-on reset, the address and data bus pins (AD15–AD0
for the 186, AO15–AO8 and AD7–AD0 for the 188) can also be used to
load system configuration information into the internal reset
configuration register.
1
). It supplies data to the system during the remaining periods
System Overview
2
, t
3
, and t
4
).
2
, t
3
, and t
4.
3-1