AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 55

• Manufacturer Part Number: AM186ES
• Description: microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
• Manufacturer: Advanced Micro Devices

3.3
3.3.1
3.3.2
BUS INTERFACE UNIT
The bus interface unit controls all accesses to external peripherals and memory devices.
External accesses include those to memory devices, as well as those to memory-mapped
and I/O-mapped peripherals and the peripheral control block. The Am186ES and Am188ES
microcontrollers provide an enhanced bus interface unit with the following features:
The standard 80C186/188 microcontroller multiplexed address and data bus requires
system-interface logic and an external address latch. On the Am186ES and Am188ES
microcontrollers, new byte write enables, PSRAM control logic, and a new nonmultiplexed
address bus can reduce design costs by eliminating external logic.
Timing diagrams for the operations described in this chapter appear in the Am186ES and
Am188ES Microcontrollers Data Sheet , order# 20002.
Nonmultiplexed Address Bus
The nonmultiplexed address bus (A19–A0) is valid one-half CLKOUTA cycle in advance
of the address on the AD bus. When used in conjunction with the modified UCS and LCS
outputs and the byte write enable signals, the A19–A0 bus provides a seamless interface
to SRAM, PSRAM, and Flash/EPROM memory systems.
Static Bus Sizing
The 80C186 microcontroller provided a 16-bit wide data bus over its entire address range,
memory, and I/O, but did not allow accesses to an 8-bit wide bus. The 80C188
microcontroller provided a lower-cost interface by reducing the data bus width to 8 bits,
again over the entire address range. The Am188ES microcontroller follows the 80C188
microcontroller in providing an 8-bit data bus to all memory and peripherals. However, the
Am186ES microcontroller differs from the 80C186 microcontroller in allowing
programmability for data bus widths through fields in the auxiliary configuration (AUXCON)
register, as shown in Table 3-3.
The width of the data access should not be modified while the processor is fetching
instructions from the associated address space or while the peripheral control block is
overlaid on the affected address space.
A nonmultiplexed address bus
On the Am186ES microcontroller, a static bus sizing option for 8-bit and 16-bit memory
and I/O
On the Am186ES microcontroller, separate byte write enables for high and low bytes
Pseudo Static RAM (PSRAM) support
System Overview
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