AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 186

• Manufacturer Part Number: AM186ES
• Description: microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
• Manufacturer: Advanced Micro Devices

I-2
R19-R8 (Relocation Address Bits) 4-3
R1-R0 (Wait State Value) 5-5, 5-7, 5-9, 5-11
R2 (Ready Mode) 5-5, 5-7, 5-9, 5-11
R7 (Address Disable) 5-5, 5-7
RB8 (Received Bit 8) 10-9
RC (Reset Configuration) 4-4
RC8-RC0 (Refresh Counter Reload Value) 6-2
RDATA (Receive Data) 10-12
RDR (Receive Data Ready) 10-9
RIU (Register in Use) 8-3
RTG (Retrigger Bit) 8-3
S/M (Slave/Master) 4-3
S4-S0 (Poll Status) 7-25, 7-26
S4-S0 (Source Vector Type) 7-27
SDEC (Source Decrement) 9-4
SFNM (Special Fully Nested Mode) 7-14
SINC (Source Increment) 9-4
SM/IO (Source Address Space Select) 9-4
SPI (Serial Port Interrupt In-Service) 7-22
SPI (Serial Port Interrupt Mask) 7-24
SPI (Serial Port Interrupt Request) 7-20
ST (Start/Stop DMA Channel) 9-5
SYN1-SYN0 (Synchronization Type) 9-4
T4-T0 (Interrupt Type) 7-36
T8-T0 (Refresh Count) 6-2
TC (Terminal Count) 9-4
TC15-TC0 (Timer Compare Value) 8-7
TC15-TC0 (Timer Count Register) 9-6
TC15-TC0 (Timer Count Value) 8-6
TDATA (Transmit Data) 10-11
TDRQ (Timer Enable/Disable Request) 9-4
TEMT (Transmitter Empty) 10-10
THRE (Transmit Holding Register Empty) 10-9
TMR (Timer Interrupt In-Service) 7-22
TMR (Timer Interrupt Mask) 7-24
TMR (Timer Interrupt Request) 7-21
TMR0 (Timer 0 Interrupt In-Service) 7-32
TMR0 (Timer 0 Interrupt Mask) 7-34
TMR0 (Timer 0 Interrupt Request) 7-31
TMR2-TMR0 (Timer Interrupt Request) 7-19, 7-30
TMR2-TMR1 (Timer 2/Timer 1 Interrupt In-Service)
TMR2-TMR1 (Timer 2/Timer 1 Interrupt Mask) 7-34
TRM2-TMR1 (Timer2/Timer1 Interrupt Request) 7-
UB2-UB0 (Upper Boundary) 5-6
WD (Virtual Watchdog Timer Interrupt In-Service)
7-32
31
Index
BRK1 bit (Long Break Detected) 10-9
C bit (Cascade Mode) 7-14
Cascade mode 7-11
CHG bit (Change Start Bit) 9-4
Clock Prescaler Register
CONT bit (Continuous Mode Bit)
D1-D0 field (DMA Channel Interrupt In-Service) 7-22, 7-
D1-D0 field (DMA Channel Interrupt Masks) 7-24
D1-D0 field (DMA Channel Interrupt Request) 7-31
DDA15-DDA0 field (DMA Destination Address Low) 9-8
DDA19-DDA16 field (DMA Destination Address High)
DDEC bit (Destination Decrement) 9-3
development tools
DHLT bit (DMA Halt) 7-19, 7-30
DINC bit (Destination Increment) 9-4
DM/IO bit (Destination Address Space Select) 9-3
DMA (DMA Control Field) 10-5
DMA 0 Control Register
DMA 0 Destination Address High Register
DMA 0 Destination Address Low Register
DMA 0 Interrupt Control Register
DMA 0 Source Address High Register
DMA 0 Source Address Low Register
WD (Virtual Watchdog Timer Interrupt Mask) 7-24
WD (Virtual Watchdog Timer Interrupt Request) 7-
description 6-2
Timer 0 Mode/Control Register 8-4
Timer 1 Mode/Control Register 8-4
Timer 2 Mode/Control Register 8-5
third-party products xiv
description 9-3
description 9-7
description 9-8
description
description 9-9
description 9-10
C
D
32, 7-34
9-7
Master mode
Slave mode
7-22
20
7-29
7-17