AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 116

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AM186ES

Manufacturer Part Number
AM186ES
Description
microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
Manufacturer
Advanced Micro Devices
Datasheets

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7.4
7.4.1
7.4.2
Table 7-5
7-28
SLAVE MODE OPERATION
When slave mode is used, the internal microcontroller interrupt controller is used as a slave
controller to an external master interrupt controller. The internal interrupts are monitored
by the internal interrupt controller, while the external controller functions as the system
master interrupt controller.
On reset, the microcontroller is in master mode. To activate slave mode operation, bit 14
of the relocation register must be set (see Figure 4-1 on page 4-3).
Because of pin limitations caused by the need to interface to an external 82C59A master,
the internal interrupt controller does not accept external inputs. However, there are enough
interrupt controller inputs (internally) to dedicate one to each timer. In slave mode, each
timer interrupt source has its own mask bit, IS bit, and control word.
The INT4 and serial port interrupts are not available in slave mode. In slave mode, each
peripheral must be assigned a unique priority to ensure proper interrupt controller operation.
The programmer must assign correct priorities and initialize interrupt control registers
before enabling interrupts.
Slave Mode Interrupt Nesting
Slave mode operation allows nesting of interrupt requests. When an interrupt is
acknowledged, the priority logic masks off all priority levels except those with equal or higher
priority.
Slave Mode Interrupt Controller Registers
The interrupt controller registers for slave mode are shown in Table 7-5. All registers can
be read and written, unless specified otherwise.
Interrupt Controller Registers in Slave Mode
Offset
3Ah
38h
36h
34h
32h
30h
2Eh
2Ch
2Ah
28h
22h
20h
Register
Mnemonic
T2INTCON
T1INTCON
DMA1CON
DMA0CON
T0INTCON
INTSTS
REQST
INSERV
PRIMSK
IMASK
EOI
INTVEC
Register Name
Timer 2 Interrupt Control
Timer 1 Interrupt Control
DMA 1 Interrupt Control/INT6 DRQ1/INT6
DMA 0 Interrupt Control/INT5 DRQ0/INT5
Timer 0 Interrupt Control
Interrupt Status
Interrupt Request
In-Service
Priority Mask
Interrupt Mask
Specific EOI
Interrupt Vector
Interrupt Control Unit
Affected Pins Comments
TMRIN1
TMROUT1
TMRIN0
TMROUT0
Interrupt Type XXXXX101
Interrupt Type XXXXX100
Interrupt Type XXXXX011
Interrupt Type XXXXX010
Interrupt Type XXXXX000

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