ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 97

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 85.
Table 87.
ISP1362_7
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
15 to 0
Symbol
INTLBufferSize[15:0] R/W
HcISTLToggleRate register: bit allocation
HcINTLBufferSize register: bit description
14.7.4 HcISTLToggleRate register (R/W: 47h/C7h)
14.8.1 HcINTLBufferSize register (R/W: 33h/B3h)
14.8.2 HcINTLBufferPort register (R/W: 43h/C3h)
14.8 Interrupt transfer registers
15
7
-
-
-
-
When the pointer has reached the initialized byte count of the HcTransferCounter register,
the host controller sets the AllEOTInterrupt bit in the HcμPInterrupt register to logic 1 and
updates the HcBufferStatus register.
The rate of toggling between ISTL0 and ISTL1 is programmable. The HcISTLToggleRate
register is provided to program the required toggle rate in the range of 0 ms to 15 ms at
intervals of 1 ms. The bit allocation of the register is shown in
Code (Hex): 47 — read
Code (Hex): C7 — write
Table 86.
This register allows you to allocate the size of the INTL buffer to be used for interrupt
transactions. The default value of the buffer size is set to 128 bytes, and the maximum
allowable allocated size is 4096 bytes.
Code (Hex): 33 — read
Code (Hex): B3 — write
In addition to the HcDirectAddressData register, the ISP1362 provides this register to act
as another data port to access the INTL buffer. The starting address to access the buffer is
always fixed at 0000h. Therefore, random access of the INTL buffer is not allowed. The bit
description of the HcINTLBufferPort register is given in
Bit
15 to 4
3 to 0
Access
14
6
-
-
-
-
reserved
HcISTLToggleRate register: bit description
Symbol
-
ISTLToggleRate[3:0]
Value
0080h
13
5
-
-
-
-
Rev. 07 — 29 September 2009
The size of the buffer to be used for interrupt transactions and must
Description
be specified in bytes.
12
4
-
-
-
-
Description
reserved
The required toggle rate in ms.
reserved
Table 87
R/W
11
3
0
-
-
shows the bit description of the register.
ISTLToggleRate[3:0]
Table
Single-chip USB OTG controller
R/W
10
2
0
-
-
88.
Table
85.
© ST-ERICSSON 2009. All rights reserved.
R/W
9
1
0
-
-
ISP1362
R/W
97 of 147
8
0
0
-
-