ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 83

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 62.
ISP1362_7
Product data sheet
Bit
Symbol
Reset
Access
HcRhPortStatus[1:2] register: bit allocation
14.3.4 HcRhPortStatus[1:2] register (R/W [1]: 15h/95h; [2]: 16h/96h)
31
-
-
Table 61.
The HcRhPortStatus[1:2] register is used to control and report port events on a per-port
basis. NumberofDownstreamPort represents the number of HcRhPortStatus registers that
are implemented in the hardware. The lower word is used to reflect the port status,
whereas the upper word reflects status change bits. Some status bits are implemented
with special write behavior. Reserved bits should always be written logic 0. The bit
allocation of the HcRhPortStatus[1:2] register is given in
Code (Hex): [1] = 15, [2] = 16 — read
Code (Hex): [1] = 95, [2] = 96 — write
Bit
31
30 to 18 -
17
16
15
14 to 2
1
0
30
-
-
Symbol Description
CRWE
CCIC
LPSC
DRWE
-
OCI
LPS
HcRhStatus register: bit description
On write ClearRemoteWakeupEnable: Writing logic 1 clears
DeviceRemoteWakeupEnable (DRWE). Writing logic 0 has no effect.
reserved
OverCurrentIndicatorChange: This bit is set by the hardware when a
change has occurred to the OverCurrentIndicator (OCI) field of this register.
The HCD clears this bit by writing logic 1. Writing logic 0 has no effect.
On read LocalPowerStatusChange: The root hub does not support the local
power status feature. Therefore, this bit is always read as logic 0.
On write SetGlobalPower: In global power mode (PowerSwitchingMode = 0),
logic 1 is written to this bit to turn on power to all ports (clear
PortPowerStatus). In per-port power mode, it sets PortPowerStatus only on
ports whose PortPowerControlMask bit is not set. Writing logic 0 has no effect.
On read DeviceRemoteWakeupEnable: This bit enables
bit ConnectStatusChange as a resume event, causing a state transition from
USBSuspend to USBResume and setting the ResumeDetected interrupt.
0 — ConnectStatusChange is not a remote wake-up event
1 — ConnectStatusChange is a remote wake-up event
On write SetRemoteWakeupEnable: Writing logic 1 sets
DeviceRemoteWakeupEnable. Writing logic 0 has no effect.
reserved
OverCurrentIndicator: This bit reports overcurrent conditions when global
reporting is implemented. When set, an overcurrent condition exists. When
cleared, all power operations are normal. If per-port overcurrent protection is
implemented, this bit is always logic 0.
On read LocalPowerStatus: The root hub does not support the local power
status feature. Therefore, this bit is always read as logic 0.
On write ClearGlobalPower: In global power mode (PowerSwitchingMode =
0), logic 1 is written to this bit to turn-off power to all ports (clear
PortPowerStatus). In per-port power mode, it clears PortPowerStatus only on
ports whose PortPowerControlMask bit is not set. Writing logic 0 has no effect.
29
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-
Rev. 07 — 29 September 2009
28
-
-
reserved
27
-
-
Single-chip USB OTG controller
Table
26
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62.
© ST-ERICSSON 2009. All rights reserved.
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