ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 16
ISP1362BDTM
Manufacturer Part Number
ISP1362BDTM
Description
Manufacturer
STEricsson
Datasheet
1.ISP1362BDTM.pdf
(147 pages)
Specifications of ISP1362BDTM
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
Available stocks
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ISP1362BDTM
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ISP1362_7
Product data sheet
Figure 5
block size of 64 bytes. The HCD may put a PTD with payload size of up to 64 bytes but
not more. Depending on the ATL or INTL buffer size, up to 32 ATL blocks and 32 INTL
blocks can be allocated. Note that a portion of the ATL or INTL buffer remains unused.
This is allowed but can be avoided by choosing the appropriate ATL or INTL buffer size
and block size.
The ISTL0 or ISTL1 buffer memory (for isochronous transfer) uses a different memory
management scheme (see
memory. While the PTD header remains 8 bytes for all PTDs, the PTD payload can be of
any size. The PTD payload, however, is padded to the next double word boundary when
the host controller calculates the location of the next PTD header. The ISP1362 host
controller checks the payload size from the ‘Total size’ field of the PTD itself and
calculates the location of the next PTD header based on this information.
Fig 5.
provides a snapshot of a sample ATL or INTL buffer area of 256 bytes with a
A sample snapshot of the ATL or INTL memory management scheme
ATL or INTL buffer area
Starting address of the
Rev. 07 — 29 September 2009
Figure
64 bytes PTD header
8 bytes PTD header
64 bytes PTD header
8 bytes PTD header
8 bytes PTD header
64 bytes PTD header
6). There is no fixed block size for the ISTL buffer
Payload area
Payload area
Payload are
004aaa055
Block of 72 bytes
(64 + 8,
72 bytes
72 bytes
where 64 is the block size defined)
Single-chip USB OTG controller
© ST-ERICSSON 2009. All rights reserved.
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