ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 85

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

ISP1362_7
Product data sheet
Table 63.
Bit
16
15 to 10
9
8
7 to 5
4
Symbol
CSC
-
LSDA
PPS
-
PRS
HcRhPortStatus[1:2] register: bit description
Description
ConnectStatusChange: This bit is set whenever a connect or disconnect
event occurs. The HCD writes logic 1 to clear this bit. Writing logic 0 has no
effect. If CurrentConnectStatus (CCS) is cleared when a SetPortReset,
SetPortEnable or SetPortSuspend write occurs, this bit is set to force the
driver to re-evaluate the connection status because these writes should not
occur if the port is disconnected.
0 — no change in CurrentConnectStatus (CCS)
1 — change in CurrentConnectStatus (CCS)
Remark: If the DeviceRemovable[NDP] bit is set, this bit is set only after a
root hub reset to inform the system that the device is attached.
reserved
device attached to this port. When set, a low-speed device is attached to this
port. When cleared, a full-speed device is attached to this port. This field is
valid only when CurrentConnectStatus (CCS) is set.
0 — full-speed device attached
1 — low-speed device attached
On write ClearPortPower: The HCD clears the PortPowerStatus (PPS) bit
by writing logic 1 to this bit. Writing logic 0 has no effect.
On read PortPowerStatus: This bit reflects the port power status, regardless
of the type of power switching implemented. This bit is cleared if an
overcurrent condition is detected. The HCD sets this bit by writing
SetPortPower or SetGlobalPower. The HCD clears this bit by writing
ClearPortPower or ClearGlobalPower. PowerSwitchingMode (PCM) and
PortPowerControlMask[NDP] (PPCM[NDP]) determine which power control
switches are enabled. In global switching mode (PowerSwitchingMode = 0),
only the Set/ClearGlobalPower command controls this bit. In the per-port
power switching (PowerSwitchingMode = 1), if the
PortPowerControlMask[NDP] (PPCM[NDP]) bit for the port is set, only
Set/ClearPortPower commands are enabled. If the mask is not set, only
Set/ClearGlobalPower commands are enabled. When port power is disabled,
CurrentConnectStatus (CCS), PortEnableStatus (PES), PortSuspendStatus
(PSS) and PortResetStatus (PRS) should be reset.
0 — port power is off
1 — port power is on
On write SetPortPower: The HCD writes logic 1 to set the PortPowerStatus
(PPS) bit. Writing logic 0 has no effect.
Remark: This bit always reads logic 1 if power switching is not supported.
reserved
On read PortResetStatus: When this bit is set by a write to SetPortReset,
port reset signaling is asserted. When reset is completed, this bit is cleared
when PortResetStatusChange (PRSC) is set. This bit cannot be set if
CurrentConnectStatus (CCS) is cleared.
0 — port reset signal is not active
1 — port reset signal is active
On write SetPortReset: The HCD sets the port reset signaling by writing
logic 1 to this bit. Writing logic 0 has no effect. If CurrentConnectStatus
(CCS) is cleared, this write does not set PortResetStatus (PRS) but instead
sets ConnectStatusChange (CSC). This informs the driver that it attempted
to reset a disconnected port.
On read LowSpeedDeviceAttached: This bit indicates the speed of the
Rev. 07 — 29 September 2009
…continued
Single-chip USB OTG controller
© ST-ERICSSON 2009. All rights reserved.
ISP1362
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