ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 60

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ISP1362BDTM

Manufacturer Part Number
ISP1362BDTM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1362BDTM

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1362BDTM
Manufacturer:
NANYA
Quantity:
1 001
Part Number:
ISP1362BDTM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Table 23.
ISP1362_7
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
OtgControl register: bit allocation
PULLDN_
LOC_
R/W
DM
15
7
1
-
-
Table 24.
Bit
15 to 12 -
11
10
9
8
7
6
5
PULLDN_
LOC_
R/W
DP
14
6
1
-
-
Symbol
OTG_SE0_
EN
A_SRP_DET
_EN
A_SEL_SRP
SEL_HC_DC
LOC_
PULLDN_DM
LOC_
PULLDN_DP
A_RDIS_
LCON_EN
reserved
OtgControl register: bit description
LCON_EN
A_RDIS_
R/W
13
5
0
-
-
Rev. 07 — 29 September 2009
Description
reserved
This bit is used by the host controller to send SE0 on remote connect.
0 — no SE0 sent on remote connect detection
1 — SE0 (bus reset) sent on remote connect detection
Remark: This bit is normally set when the B-device goes into the
b_wait_acon state (recommended sequence: LOC_CONN = 0 →
DELAY → 50 μs → OTG_SE0_EN = 1 → SEL_HC_DC = 0) and is
cleared when it comes out of the b_wait_acon state.
This bit is for the A-device only. If set, the A_SRP_DET bit in the
OtgInterrupt register will be set on detecting an SRP event.
0 — disable
1 — enable
This bit is for the A-device to select a method to detect the SRP event
(V
0 — A-device responds to the V
1 — A-device responds to the data line pulsing
This bit is used to select either the peripheral controller or the host
controller that interfaces with the transceiver.
0 — host controller SIE is connected to the OTG transceiver
1 — peripheral controller SIE is connected to the OTG transceiver
0 — disconnects the on-chip pull-down resistor on DM of the OTG port
1 — connects the on-chip pull-down resistor on DM of the OTG port
0 — disconnects the on-chip pull-down resistor on DP of the OTG port
1 — connects the on-chip pull-down resistor on DP of the OTG port
This bit is for the A-device only. If set, the chip will automatically enable
its pull-up resistor on DP on detecting a remote disconnect event. If
cleared, the DP pull-up is controlled by the LOC_CONN bit.
0 — disable
1 — enable
Remark: This bit is normally set when the A-device goes into the
a_suspend state and is cleared when it comes out of the a_suspend
state. The LOC_CONN bit must be set before clearing this bit.
BUS
pulsing or data line pulsing).
CONN
LOC_
R/W
12
4
0
-
-
OTG_SE0_
SEL_CP_
R/W
EXT
R/W
EN
11
0
3
0
BUS
DISCHRG_
DET_EN
A_SRP_
Single-chip USB OTG controller
VBUS
R/W
R/W
pulsing
10
0
2
0
A_SEL_
CHRG_
VBUS
© ST-ERICSSON 2009. All rights reserved.
SRP
R/W
R/W
9
0
1
0
ISP1362
SEL_HC_
VBUS
DRV_
R/W
R/W
DC
60 of 147
8
1
0
0

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