ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 8

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 2.
ISP1362_7
Product data sheet
Symbol
V
D12
D13
D14
D15
DGND
RD
CS
WR
TEST0
DREQ1
CC
[1]
Pin description
Pin
LQFP64
14
15
16
17
18
19
20
21
22
23
24
TFBGA64
J2
J1
K1
K2
J3
K3
J4
K4
J5
K5
J6
…continued
Type
-
I/O
I/O
I/O
I/O
-
I
I
I
I/O
O
Rev. 07 — 29 September 2009
Description
supply voltage (3.3 V); it is recommended that you connect a decoupling
capacitor of 0.01 μF
bit 12 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
bit 13 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
bit 14 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
bit 15 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, 3-state output
digital ground
read strobe input; when asserted LOW, it indicates that the host
controller/peripheral controller driver is requesting a read to the buffer
memory or the internal registers of the host controller/peripheral
controller
input with hysteresis
chip select input (active LOW); enables the host controller/peripheral
controller driver to access the buffer memory and registers of the host
controller/peripheral controller
input
write strobe input; when asserted LOW, it indicates that the host
controller/peripheral controller driver is requesting a write to the buffer
memory or the internal registers of the host controller/peripheral
controller
input with hysteresis
for test input and output; pulled HIGH by a 100 kΩ resistor
bidirectional, push-pull input, 3-state output
DMA request output; when active, it signals the DMA controller that a
data transfer is requested by the host controller; the active level (HIGH or
LOW) of the request is programmed by using the
HcHardwareConfiguration register (20h/A0h)
If the OneDMA bit of the HcHardwareConfiguration register is set to
logic 1, both the host controller and the peripheral controller DMA
channel will be routed to DREQ1 and DACK1.
push-pull output
Single-chip USB OTG controller
© ST-ERICSSON 2009. All rights reserved.
ISP1362
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