ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 42

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 9.
[1]
Table 11.
ISP1362_7
Product data sheet
Bit
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Name
ActualBytes[9:0]
CompletionCode[3:0]
Active
Toggle
MaxPktSize[9:0]
EndpointNumber[3:0]
B3[3] Last (PTD)
Speed (low)
TotalBytes[9:0]
[1]
All reserved bits must be set to logic 0.
Generic PTD structure: bit allocation
Generic PTD structure: bit description
reserved
B5[7]
7
Table 10.
[1]
Bit
B3[3]
B5[6]
B5[7]
B7[7:0]
Status update
by HC
Yes
Yes
Yes
Yes
No
No
No
No
No
[1]
All reserved bits must be set to logic 0.
CompletionCode[3:0]
EndpointNumber[3:0]
B5[6]
6
Special fields for ATL, interrupt and ISO
This field contains the number of bytes that were transferred for this PTD.
This specifies the total number of bytes to be transferred with this data
Description
See
Set to logic 1 by the firmware to enable the execution of transactions by the
host controller. When the transaction associated with this descriptor is
completed, the host controller sets this bit to logic 0, indicating that a
transaction for this element must not be executed when it is next encountered
in the schedule.
This bit is used to generate or compare the data PID value (DATA0 or DATA1)
for IN and OUT transactions. It is updated after each successful transmission
or reception of a data packet.
This indicates the maximum number of bytes that can be sent to or received
from the endpoint in a single data packet.
This is the USB address of the endpoint within the function.
This indicates that it is the last PTD of a list. Logic 1 means that this PTD is the
last PTD. The last PTD is used only for ISO. This bit is not used in the interrupt
and ATL transfers. The last PTD is indicated by the HcINTLLastPTD and
HcATLLastPTD registers.
This bit indicates the speed of the endpoint.
0 — full-speed
1 — low-speed
structure. This can be greater than MaxPacketSize.
5
Rev. 07 — 29 September 2009
Table 12
ATL
reserved
Ping-Pong
Paired
reserved
reserved
ActualBytes[7:0]
MaxPktSize[7:0]
4
TotalBytes[7:0]
FunctionAddress[6:0]
B7[7:0]
Active
B3[3]
3
Interrupt
reserved
reserved
reserved
PollingRate[7:5];
StartingFrame[4:0]
DirToken[1:0]
Toggle
Single-chip USB OTG controller
Speed
2
ISTL (ISO)
Last
reserved
reserved
StartingFrame
© ST-ERICSSON 2009. All rights reserved.
ActualBytes[9:8]
MaxPktSize[9:8]
1
TotalBytes[9:8]
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0