ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 59

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

13. OTG registers
Table 22.
ISP1362_7
Product data sheet
Command (Hex)
Read
62
67
68
69
6A
6C
OTG Control registers overview
Write
E2
not applicable OtgStatus
E8
E9
EA
EC
12.5.2 Resume conditions
13.1 OtgControl register (R/W: 62h/E2h)
D — indicates remote wake-up. The ISP1362 will drive a K-state on the USB bus for
10 ms after the D_SUSPEND/D_WAKEUP pin goes LOW or the CS pin goes LOW.
Wake-up from the suspend state is initiated either by the USB host or by the application:
The steps of a wake-up sequence are as follows:
Code (Hex): 62 — read
Code (Hex): E2 — write
1. The internal oscillator and the PLL multiplier are re-enabled. When stabilized, clock
2. The D_SUSPEND/D_WAKEUP pin goes LOW, and the RESUME bit of the
3. After 5 ms of starting the wake-up sequence, the peripheral controller in the ISP1362
4. In a remote wake-up, the peripheral controller in the ISP1362 drives a K-state on the
5. The application restores itself and other system components to normal operating
6. After wake-up, internal registers of the peripheral controller in the ISP1362 are read
•
•
Register
OtgControl
OtgInterrupt
OtgInterruptEnable
OtgTimer
OtgAltTimer
USB host: drives a K-state on the USB bus (global resume).
Application: remote wake-up using a LOW pulse on pin D_SUSPEND/D_WAKEUP or
a LOW pulse on pin CS (if enabled using bit WKUPCS of the
DcHardwareConfiguration register).
signals are routed to all internal circuits of the peripheral controller in the ISP1362.
DcInterrupt register is set. This will generate an interrupt if bit IERESUME of the
DcInterruptEnable register is set.
resumes its normal functionality (this can be set to 100 μs by setting pin TEST0 to
HIGH).
USB bus for 10 ms.
mode.
and write-protected to prevent corruption by inadvertent writing during power-up of
external components. The firmware must send an Unlock Device command to the
peripheral controller in the ISP1362 to restore its full functionality.
Rev. 07 — 29 September 2009
Width
16
16
16
16
32
32
References
Section 13.1 on page 59
Section 13.2 on page 61
Section 13.3 on page 62
Section 13.4 on page 64
Section 13.5 on page 65
Section 13.6 on page 66
Single-chip USB OTG controller
Functionality
OTG operation registers
© ST-ERICSSON 2009. All rights reserved.
ISP1362
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